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"Two Level Compact Simulation Methodology for Timing Analysis of ..."

Stephan Henzler et al. (2004)

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DOI: 10.1007/978-3-540-30205-6_81

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/patmos/HenzlerGBS04a
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  - https://dblp.org/rec/conf/patmos/HenzlerGBS04a
Stephan Henzler, Georg Georgakos, Jörg Berthold, Doris Schmitt-Landsiedel:
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. PATMOS 2004: 789-798

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