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"Parallel Algorithms for Minimizing Multiple-Valued Programmable Logic Arrays."

Parthasarathy P. Tirumalai, Varadarajan G. Vadakkencherry (1991)

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DOI: 10.1109/ISMVL.1991.130744

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - conf/ismvl/TirumalaiV91
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  - https://dblp.org/rec/conf/ismvl/TirumalaiV91
Parthasarathy P. Tirumalai, Varadarajan G. Vadakkencherry:
Parallel Algorithms for Minimizing Multiple-Valued Programmable Logic Arrays. ISMVL 1991: 287-295

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