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"A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with ..."

Sylvain Clerc et al. (2012)

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DOI: 10.1109/ICICDT.2012.6232860

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Sylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, Dimitri Soussan, Philippe Roche:
A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error tolerance. ICICDT 2012: 1-4

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