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"Deterministic Clock Gating for Microprocessor Power Reduction."

Hai Li et al. (2003)

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DOI: 10.1109/HPCA.2003.1183529

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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  - https://dblp.org/rec/conf/hpca/LiBCVR03
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy:
Deterministic Clock Gating for Microprocessor Power Reduction. HPCA 2003: 113-122

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