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"Instruction Scheduling for Power Reduction in Processor-Based System Design."

Hiroyuki Tomiyama et al. (1998)

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DOI: 10.1109/DATE.1998.655958

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/date/TomiyamaIIY98
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  persistent URL:
  - https://dblp.org/rec/conf/date/TomiyamaIIY98
Hiroyuki Tomiyama, Tohru Ishihara, Akihiko Inoue, Hiroto Yasuura:
Instruction Scheduling for Power Reduction in Processor-Based System Design. DATE 1998: 855-860

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