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"A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh ..."

Austin Rovinski et al. (2019)

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DOI: 10.23919/VLSIC.2019.8778031

access: closed

type: Conference or Workshop Paper

metadata version: 2023-12-12

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Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski:
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits 2019: 30-

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