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Kanad Ghose
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2020 – today
- 2023
- [c96]Gaurav Kothari, Kanad Ghose
:
Thermally-Aware Multi-Core Chiplet Stacking. ICCAD 2023: 1-9 - [c95]Ravi Theja Gollapudi, Gokturk Yuksek, David Demicco, Matthew Cole
Control Flow and Pointer Integrity Enforcement in a Secure Tagged Architecture. SP 2023: 2974-2989 - [i2]Syed Rafiul Hussain, Patrick D. McDaniel, Anshul Gandhi, Kanad Ghose, Kartik Gopalan, Dongyoon Lee, Yu David Liu, Zhenhua Liu, Shuai Mu, Erez Zadok:
Verifiable Sustainability in Data Centers. CoRR abs/2307.11993 (2023) - 2022
- [i1]David Demicco, Matthew Cole
Generic Tagging for RISC-V Binaries. CoRR abs/2212.05614 (2022) - 2021
- [c94]Anuroop Desu, Udaya Puvvadi, Tyler Stachecki, Sagar Vishwakarma, Sadegh Khalili, Kanad Ghose
Latency-Aware Dynamic Server and Cooling Capacity Provisioner for Data Centers. SoCC 2021: 335-349 - [c93]Sandeep S. Mittal, Jack Rothberg, Kanad Ghose
Deep Learning for Morphological Arrhythmia Classification in Encoded ECG Signal. ICMLA 2021: 575-581 - 2020
- [j16]Yang Gao
Heart Monitor Using Flexible Capacitive ECG Electrodes. IEEE Trans. Instrum. Meas. 69(7): 4314-4323 (2020) - [c92]Sandeep S. Mittal, Madina Zabran, Kanad Ghose
Low-Power Discreetly-Wearable Smart ECG Patch with On-Board Analytics. MeMeA 2020: 1-6
2010 – 2019
- 2019
- [c91]Udaya Puvvadi, Anuroop Desu, Tyler Stachecki, Kanad Ghose, Bahgat Sammakia:
An Adaptive Approach for Dealing with Flow Disruption in Virtualized Water-Cooled Data Centers. CLOUD 2019: 296-300 - [c90]Ravi Theja Gollapudi, Gokturk Yuksek, Kanad Ghose
Cache-Aware Dynamic Classification and Scheduling for Linux. COOL CHIPS 2019: 1-3 - [c89]Anuroop Desu, Udaya Puvvadi, Tyler Stachecki, Shane Case, Kanad Ghose:
AC vs. Hybrid AC/DC Powered Data Centers: A Workload Based Perspective. INDIN 2019: 1411-1418 - [c88]Bharath Ramakrishnan
Characterization of Liquid Cooled Cold Plates for a Multi Chip Module (MCM) and their Impact on Data Center Chiller Operation. INDIN 2019: 1419-1424 - [c87]Udaya Puvvadi, Anuroop Desu, Tyler Stachecki, Sami Alkharabsheh, Kanad Ghose
Flow Disruptions and Mitigation in Virtualized Water-Cooled Data Centers. INDIN 2019: 1435-1442 - [c86]Adriano Garcia, Sandeep S. Mittal, Edward Kiewra, Kanad Ghose
A Convolutional Neural Network Feature Detection Approach to Autonomous Quadrotor Indoor Navigation. IROS 2019: 74-81 - 2015
- [c85]Furat Afram, Kanad Ghose:
FlexCore: A Reconfigurable Processor Supporting Flexible, Dynamic Morphing. HiPC 2015: 30-39 - 2014
- [c84]Erdem Aktas, Furat Afram, Kanad Ghose:
Continuous, Low Overhead, Run-Time Validation of Program Executions. MICRO 2014: 229-241 - 2013
- [c83]Furat Afram, Hui Zeng, Kanad Ghose:
A group-commit mechanism for ROB-based processors implementing the X86 ISA. HPCA 2013: 47-58 - [c82]Erdem Aktas, Kanad Ghose:
Run-time control flow authentication: an assessment on contemporary x86 platforms. SAC 2013: 1859-1866 - 2012
- [c81]Shane Case, Furat Afram, Erdem Aktas, Kanad Ghose:
Energy-Aware Load Direction for Servers: A Feasibility Study. PDP 2012: 359-367 - [c80]James Rosswog, Kanad Ghose:
Detecting and Tracking Coordinated Groups in Dense, Systematically Moving, Crowds. SDM 2012: 1-11 - 2011
- [c79]Avadh Patel, Furat Afram, Shunfei Chen, Kanad Ghose
MARSS: a full system simulator for multicore x86 CPUs. DAC 2011: 1050-1055 - 2010
- [c78]James Rosswog, Kanad Ghose:
Efficiently detecting clusters of mobile objects in the presence of dense noise. SAC 2010: 1095-1102
2000 – 2009
- 2009
- [j15]Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry Ponomarev:
MPTLsim: a cycle-accurate, full-system simulator for x86-64 multicore architectures with coherent caches. SIGARCH Comput. Archit. News 37(2): 2-9 (2009) - [c77]Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry V. Ponomarev:
MPTLsim: a simulator for X86 multicore processors. DAC 2009: 226-231 - [c76]Hui Zeng, Kanad Ghose, Dmitry Ponomarev:
Register Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures. ICPP 2009: 453-461 - [c75]James Rosswog, Kanad Ghose:
Accurately clustering moving objects with adaptive history filtering. ISCIS 2009: 657-662 - [c74]Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev:
Energy-efficient renaming with register versioning. ISLPED 2009: 171-176 - [c73]Hui Zeng, Matt T. Yourst, Kanad Ghose:
An energy-efficient checkpointing mechanism for out of order commit processor. ISLPED 2009: 183-188 - 2008
- [j14]Onur Demir
Enhancing GridFTP performance using intelligent gateways. Int. J. High Perform. Comput. Netw. 5(3): 135-143 (2008) - [j13]Deniz Balkan, Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose:
Predicting and Exploiting Transient Values for Reducing Register File Pressure and Energy Consumption. IEEE Trans. Computers 57(1): 82-95 (2008) - [j12]Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose:
Selective Writeback: Reducing Register File Pressure and Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. 16(6): 650-661 (2008) - [c72]Erdem Aktas, Kanad Ghose:
DARE: A Framework for Dynamic Authentication of Remote Executions. ACSAC 2008: 453-462 - [c71]James Rosswog, Kanad Ghose:
Detecting and Tracking Spatio-temporal Clusters with Adaptive History Filtering. ICDM Workshops 2008: 448-457 - [c70]Avadh Patel, Kanad Ghose:
Energy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors. ISLPED 2008: 247-252 - 2007
- [j11]Kevin Skadron
Low-Power Design and Temperature Management. IEEE Micro 27(6): 46-57 (2007) - [c69]Zhihui Zhang, Kanad Ghose:
hFS: a hybrid file system prototype for improving small file and metadata performance. EuroSys 2007: 175-187 - [c68]Onur Demir
Securing Grid Data Transfer Services with Active Network Portals. IPDPS 2007: 1-8 - 2006
- [j10]Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
Instruction packing: Toward fast and energy-efficient instruction scheduling. ACM Trans. Archit. Code Optim. 3(2): 156-181 (2006) - [j9]Dmitry V. Ponomarev, Gurhan Kucuk
Dynamic Resizing of Superscalar Datapath Components for Energy Efficiency. IEEE Trans. Computers 55(2): 199-213 (2006) - [j8]Oguz Ergin
Early Register Deallocation Mechanisms Using Checkpointed Register Files. IEEE Trans. Computers 55(9): 1153-1166 (2006) - [c67]Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose:
SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. PACT 2006: 265-274 - [c66]Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal:
Trade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors. HiPC 2006: 135-147 - [c65]Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose:
Selective writeback: exploiting transient values for energy-efficiency and performance. ISLPED 2006: 37-42 - [c64]Hui Zeng, Kanad Ghose:
Register file caching for energy efficiency. ISLPED 2006: 244-249 - 2005
- [c63]Onur Demir
Protecting grid data transfer services with active network interfaces. GRID 2005: 9-16 - [c62]Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin
Power-Efficient Wakeup Tag Broadcast. ICCD 2005: 654-661 - [c61]Onur Demir
Real-Time Protection against DDoS Attacks Using Active Gateways. ICDCS Workshops 2005: 224-231 - [c60]Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin:
Instruction packing: reducing power and delay of the dynamic scheduling logic. ISLPED 2005: 30-35 - [c59]Matt T. Yourst, Kanad Ghose:
Incremental Commit Groups for Non-Atomic Trace Processing. MICRO 2005: 67-80 - [c58]Onur Demir
Improving Transaction Server Performance under Heavy Loads with Differentiated Service and Active Network Interfaces. NCA 2005: 251-254 - [c57]Shadi T. Khasawneh, Kanad Ghose:
An Adaptive Technique for Reducing Leakage and Dynamic Power in Register Files and Reorder Buffers. PATMOS 2005: 498-507 - 2004
- [j7]Gurhan Kucuk
Complexity-Effective Reorder Buffer Designs for Superscalar Processors. IEEE Trans. Computers 53(6): 653-665 (2004) - [j6]Dmitry V. Ponomarev, Gurhan Kucuk
Isolating Short-Lived Operands for Energy Reduction. IEEE Trans. Computers 53(6): 697-709 (2004) - [j5]Dmitry V. Ponomarev, Gurhan Kucuk
Energy Efficient Comparators for Superscalar Datapaths. IEEE Trans. Computers 53(7): 892-904 (2004) - [c56]Alisa Neeman, Peter Sulatycke, Kanad Ghose:
Fast Remote Isosurface Visualization With Chessboarding. EGPGV 2004: 75-82 - [c55]Onur Demir, Kanad Ghose:
Maintaining useful server throughput under load attacks using active NIC portals. GLOBECOM 2004: 2140-2145 - [c54]Oguz Ergin
Increasing Processor Performance Through Early Register Release. ICCD 2004: 480-487 - [c53]Oguz Ergin
Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure. MICRO 2004: 304-315 - [c52]Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization. PACS 2004: 15-29 - 2003
- [j4]Dmitry V. Ponomarev, Gurhan Kucuk
Energy-efficient issue queue design. IEEE Trans. Very Large Scale Integr. Syst. 11(5): 789-800 (2003) - [c51]Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin
Reducing Datapath Energy through the Isolation of Short-Lived Operands. IEEE PACT 2003: 258-268 - [c50]Zhihui Zhang, Kanad Ghose:
yFS: A Journaling File System Design for Handling Large Data Sets with Reduced Seeking. FAST 2003 - [c49]Gurhan Kucuk, Oguz Ergin
Distributed Reorder Buffer Schemes for Low Power. ICCD 2003: 364-370 - [c48]Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin
Reducing reorder buffer complexity through selective operand caching. ISLPED 2003: 235-240 - [c47]Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin
Power efficient comparators for long arguments in superscalar processors. ISLPED 2003: 378-383 - [c46]Gurhan Kucuk, Oguz Ergin
Energy Efficient Register Renaming. PATMOS 2003: 219-228 - 2002
- [c45]Dmitry Ponomarev, Gurhan Kucuk
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors. DATE 2002: 124-129 - [c44]Oguz Ergin
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors. ICCD 2002: 118-121 - [c43]Peter Sulatycke, Kanad Ghose:
Multithreaded Isosurface Rendering on SMPs Using Span-Space Buckets. ICPP 2002: 572-582 - [c42]Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose:
Low-complexity reorder buffer architecture. ICS 2002: 57-66 - [c41]Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose:
Energy-Efficient Design of the Reorder Buffer. PATMOS 2002: 289-299 - [e1]Kanad Ghose, Patrick H. Madden, Vivek De, Peter M. Kogge:
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002. ACM 2002, ISBN 1-58113-462-2 [contents] - 2001
- [c40]Dmitry Ponomarev, Kanad Ghose, Evgeny Saksonov
Optimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters. Euro-Par 2001: 86-95 - [c39]Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge:
Energy: efficient instruction dispatch buffer design for superscalar processors. ISLPED 2001: 237-242 - [c38]Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose:
Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. MICRO 2001: 90-101 - 2000
- [c37]Kanad Ghose:
Reducing energy requirements for instruction issue and dispatch in superscalar microprocessors (poster session). ISLPED 2000: 231-233
1990 – 1999
- 1999
- [j3]Kanad Ghose, Kiran Raghavendra Desai, Peter M. Kogge:
Accelerating object-oriented applications using method lookup caches and register windowing. J. Syst. Archit. 45(12-13): 1023-1046 (1999) - [c36]Stephen Shafer, Kanad Ghose:
Post-Scheduling Optimization of Parallel Programs. Euro-Par 1999: 440-444 - [c35]Kanad Ghose, Sudhir Aggarwal, Abhrajit Ghosh, David Goldman, Peter Sulatycke, Pavel Vasek, David R. Vogel:
Designing Multiprocessor/Distributed Real-Time Systems Using the ASSERTS Toolkit. Euro-Par 1999: 505-510 - [c34]Peter Sulatycke, Kanad Ghose:
A Fast Multithreaded Out-of-Core Visualization Technique. IPPS/SPDP 1999: 569-575 - [c33]Kanad Ghose, Milind B. Kamble:
Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation. ISLPED 1999: 70-75 - [c32]James W. Ryder, Kanad Ghose:
Multi-Sensory Browser and Editor Model. SAC 1999: 443-449 - 1998
- [c31]Dmitry V. Ponomarev, Kanad Ghose:
A comparative study of some network subsystem organizations. HiPC 1998: 436-443 - [c30]Peter Sulatycke, Kanad Ghose:
Caching-Efficient Multithreaded Fast Multiplication of Sparse Matrices. IPPS/SPDP 1998: 117-123 - 1997
- [c29]Kanad Ghose, Sudhir Aggarwal, Pavel Vasek, S. Chandra, Amritansh Raghav, Abrahijt Ghosh, David R. Vogel:
ASSERTS: a toolkit for real-time software design, development and evaluation. RTS 1997: 224-232 - [c28]Pavel Vasek, Kanad Ghose:
A comparison of two context allocation approaches for fast protected calls. HiPC 1997: 16-21 - [c27]Kanad Ghose, Seth Melnick, Tom Gaska, Seth Goldberg, Arun K. Jayendran, Brian T. Stein:
The Implementation of Low Latency Communication Primitives in the Snow Prototype. ICPP 1997: 462-461 - [c26]Milind B. Kamble, Kanad Ghose:
Analytical energy dissipation models for low-power caches. ISLPED 1997: 143-148 - [c25]Kiran Raghavendra Desai, Kanad Ghose:
Generalized cubic networks. PDP 1997: 116-126 - [c24]Kanad Ghose, Arun K. Jayendran, Brian T. Stein:
Protected, low-latency message passing in the SNOW prototype. PDP 1997: 314-321 - [c23]Milind B. Kamble, Kanad Ghose:
Energy-Efficiency of VLSI Caches: A Comparative Study. VLSI Design 1997: 261-267 - 1996
- [c22]Kanad Ghose, Kiran Raghavendra Desai, Peter M. Kogge:
Using Method Lookup Caches and Register Windowing to Speed Up Dynamically-Bound Object-Oriented Applications. EUROMICRO 1996: 441- - [c21]Kanad Ghose, Pavel Vasek:
A Fast Capability Extension to a RISC Architecture. EUROMICRO 1996: 606- - 1995
- [j2]Kanad Ghose, Kiran Raghavendra Desai:
Hierarchical Cubic Networks. IEEE Trans. Parallel Distributed Syst. 6(4): 427-435 (1995) - [c20]Nitin K. Singhvi, Kanad Ghose:
A Formal Study of the Mcube Interconnection Network. Euro-Par 1995: 579-591 - [c19]Stephen Shafer, Kanad Ghose:
Static Message Combining in Task Graph Schedules. ICPP (2) 1995: 50-54 - [c18]Kiran Raghavendra Desai, Kanad Ghose:
A Comparative Study of Single Hop WDM Interconnections for Multiprocessors. International Conference on Supercomputing 1995: 154-163 - [c17]Nitin K. Singhvi, Kanad Ghose:
The Mcube: a symmetrical cube based network with twisted links. IPPS 1995: 11-16 - [c16]Kanad Ghose, Neelima Mehdiratta:
Bottom-Up Scheduling with Wormhole and Circuit Switched Routing. LCR 1995: 291-294 - 1994
- [j1]Kanad Ghose:
The architecture of response-pipelined content addressable memories. Microprocess. Microprogramming 40(6): 387-410 (1994) - [c15]Neelima Mehdiratta, Kanad Ghose:
A Bottom-Up Approach to Task Scheduling in Distributed Memory Multiprocessors. ICPP (2) 1994: 151-154 - [c14]Kanad Ghose, R. Kym Horsell, Nitin K. Singhvi:
Hybrid Multiprocessing in OPTIMUL: A Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Interconnections. ICPP (1) 1994: 196-199 - [c13]Stephen Shafer, Kanad Ghose:
Improving Parallel Program Execution Time with Message Consolidation. IPPS 1994: 736-742 - [c12]Kanad Ghose:
OPTIMUL: A Hybrid Multiprocessor for Distributed and Shared Memory Multiprocessing with WDM Optical Fiber Interconnections. PARLE 1994: 238-249 - [c11]Neelima Mehdiratta, Kanad Ghose:
Scheduling Task Graphs Onto Distributed Memory Multiprocessors Under Realistic Constaints. PARLE 1994: 589-600 - [c10]Kanad Ghose, V. Anand Dharmaraj:
Response Pipelined CAM Chips: The First Generation and Beyond. VLSI Design 1994: 365-368 - 1993
- [c9]Kanad Ghose:
Response-pipelined CAM chips - Building blocks for large associated arrays. ASAP 1993: 144-147 - 1992
- [c8]Der-Chung Cheng, Kanad Ghose:
The time-constrained barrier synchronizer and its applications in parallel systems. ISCA 1992: 428 - [c7]Kanad Ghose, Arun Gupta:
Scalable, Pipelined, Cmos VLSI Content Addressable Memory Chips - Architecture And Implementation. VLSI Design 1992: 161-166 - 1991
- [c6]Kanad Ghose, Der-Chung Cheng:
Efficient Synchronization Schemes for Large-Scale Shared-Memory Multiprocessors. ICPP (1) 1991: 153-160 - [c5]Kanad Ghose, Sreenivas Simhadri:
A Cache Coherency Mechanism with Limited Combining Capabilities for MIN-Based Multiprocessors. ICPP (1) 1991: 296-300 - [c4]Kanad Ghose, Der-Chung Cheng:
A high performance barrier synchronizer and its novel applications in highly parallel systems. SPDP 1991: 616-619 - 1990
- [c3]Kanad Ghose, Kiran Raghavendra Desai:
The Design and Evaluation of the Hierarchical Cubic Network. ICPP (1) 1990: 355-362
1980 – 1989
- 1989
- [c2]Kanad Ghose, Kiran Raghavendra Desai:
The HCN: a versatile interconnection network based on cubes. SC 1989: 426-435 - 1988
- [c1]Kanad Ghose, Robert M. Stewart:
The capability mechanism of a VLSI processor. ICCD 1988: 106-109
Coauthor Index
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