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Peter A. Milder
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2020 – today
- 2024
- [c43]Mohammed Elbadry, Fan Ye, Peter A. Milder:
Wireless Multicast Rate Control Adaptive to Application Goodput and Loss Requirements. IoTDI 2024: 25-36 - 2023
- [j10]Marcos V. Treviso, Ji-Ung Lee
, Tianchu Ji, Betty van Aken, Qingqing Cao, Manuel R. Ciosici, Michael Hassid, Kenneth Heafield, Sara Hooker, Colin Raffel, Pedro Henrique Martins, André F. T. Martins, Jessica Zosa Forde, Peter A. Milder, Edwin Simpson
Efficient Methods for Natural Language Processing: A Survey. Trans. Assoc. Comput. Linguistics 11: 826-860 (2023) - [c42]Mallika Rathore
Precision and Performance-Aware Voltage Scaling in DNN Accelerators. ACM Great Lakes Symposium on VLSI 2023: 237-242 - [c41]Mohammadreza Alimadadi, Hieu Mai, Shenghsun Cho, Michael Ferdman, Peter A. Milder, Shuai Mu:
Waverunner: An Elegant Approach to Hardware Acceleration of State Machine Replication. NSDI 2023: 357-374 - 2022
- [j9]Michael Ferdman, Jorge Albericio, Tushar Krishna, Peter A. Milder
Guest Editorial: IEEE TC Special Issue: Hardware Acceleration of Machine Learning. IEEE Trans. Computers 71(12): 3072-3073 (2022) - [c40]Mohammed Elbadry, Fan Ye, Peter A. Milder:
OPSEL: optimal producer selection under data redundancy in wireless edge environments. ICN 2022: 22-32 - [i4]Marcos V. Treviso, Tianchu Ji, Ji-Ung Lee, Betty van Aken, Qingqing Cao, Manuel R. Ciosici, Michael Hassid, Kenneth Heafield, Sara Hooker, Pedro Henrique Martins, André F. T. Martins, Peter A. Milder, Colin Raffel, Edwin Simpson, Noam Slonim, Niranjan Balasubramanian, Leon Derczynski, Roy Schwartz:
Efficient Methods for Natural Language Processing: A Survey. CoRR abs/2209.00099 (2022) - 2021
- [j8]Shenghsun Cho, Mrunal Patel, Michael Ferdman, Peter A. Milder
Practical Model Checking on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 14(2): 8:1-8:18 (2021) - [c39]Tianchu Ji, Shraddhan Jain, Michael Ferdman, Peter A. Milder, H. Andrew Schwartz, Niranjan Balasubramanian:
On the Distribution, Sparsity, and Inference-time Quantization of Attention Values in Transformers. ACL/IJCNLP (Findings) 2021: 4147-4157 - [c38]Mohammed Elbadry, Fan Ye, Peter A. Milder:
Aletheia: A Lightweight Tool for WiFi Medium Analysis on The Edge. ICC 2021: 1-7 - [c37]Mohammed Elbadry, Fan Ye, Peter A. Milder:
Unifying Address and Name Based Communication in Wireless Medium Access Control. MILCOM 2021: 162-168 - [i3]Tianchu Ji, Shraddhan Jain, Michael Ferdman, Peter A. Milder, H. Andrew Schwartz, Niranjan Balasubramanian:
On the Distribution, Sparsity, and Inference-time Quantization of Attention Values in Transformers. CoRR abs/2106.01335 (2021) - 2020
- [j7]Mallika Rathore
Error Probability Models for Voltage-Scaled Multiply-Accumulate Units. IEEE Trans. Very Large Scale Integr. Syst. 28(7): 1665-1675 (2020) - [c36]Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder
FPGA-Accelerated Samplesort for Large Data Sets. FPGA 2020: 222-232 - [c35]Mohammed Elbadry, Fan Ye, Peter A. Milder, Yuanyuan Yang:
Pub/Sub in the Air: A Novel Data-centric Radio Supporting Robust Multicast in Edge Environments. SEC 2020: 257-270 - [c34]Shenghsun Cho, Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder
Flick: Fast and Lightweight ISA-Crossing Call for Heterogeneous-ISA Environments. ISCA 2020: 187-198
2010 – 2019
- 2019
- [j6]Yongming Shen, Tianchu Ji, Michael Ferdman, Peter A. Milder
Argus: An End-to-End Framework for Accelerating CNNs on FPGAs. IEEE Micro 39(5): 17-25 (2019) - [c33]Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder:
Sorting Large Data Sets with FPGA-Accelerated Samplesort. FCCM 2019: 326 - [c32]Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter A. Milder
Runtime-Programmable Pipelines for Model Checkers on FPGAs. FPL 2019: 51-58 - 2018
- [j5]Joël Cathébras, Alexandre Carbon, Peter A. Milder
Data Flow Oriented Hardware Design of RNS-based Polynomial Multiplication for SHE Acceleration. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(3): 69-88 (2018) - [c31]Arani Bhattacharya
Quantifying Energy and Latency Improvements of FPGA-Based Sensors for Low-Cost Spectrum Monitoring. DySPAN 2018: 1-5 - [c30]Shenghsun Cho, Mrunal Patel, Han Chen, Michael Ferdman, Peter A. Milder
A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs. FPGA 2018: 87-96 - [c29]Yongming Shen, Tianchu Ji, Michael Ferdman, Peter A. Milder
Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide DRAM Controller Interfaces. FPL 2018: 101-105 - [c28]Shenghsun Cho, Michael Ferdman, Peter A. Milder
FPGASwarm: High Throughput Model Checking on FPGAs. FPL 2018: 435-442 - [c27]Mohammed Elbadry, Bing Zhou, Fan Ye, Peter A. Milder, Yuanyuan Yang
Poster: A Raspberry Pi Based Data-Centric MAC for Robust Multicast in Vehicular Network. MobiCom 2018: 714-716 - [i2]Yongming Shen, Tianchu Ji, Michael Ferdman, Peter A. Milder:
Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide DRAM Controller Interfaces. CoRR abs/1807.04013 (2018) - 2017
- [j4]Maria Isabel Mera
Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression. ACM Trans. Embed. Comput. Syst. 16(4): 96:1-96:20 (2017) - [c26]Yongming Shen, Michael Ferdman, Peter A. Milder
Escher: A CNN Accelerator with Flexible Buffering to Minimize Off-Chip Transfer. FCCM 2017: 93-100 - [c25]Yongming Shen, Michael Ferdman, Peter A. Milder:
Storage-Efficient Batching for Minimizing Bandwidth of Fully-Connected Neural Network Layers (Abstract Only). FPGA 2017: 293 - [c24]Peter A. Milder
Practical Matlab experience in lecture-based signals and systems courses. ICASSP 2017: 6339-6343 - [c23]Yongming Shen, Michael Ferdman, Peter A. Milder:
Maximizing CNN Accelerator Efficiency Through Resource Partitioning. ISCA 2017: 535-547 - 2016
- [j3]Marcela Zuluaga, Peter A. Milder
Streaming Sorting Networks. ACM Trans. Design Autom. Electr. Syst. 21(4): 55:1-55:30 (2016) - [c22]Yongming Shen, Michael Ferdman, Peter A. Milder
Overcoming resource underutilization in spatial CNN accelerators. FPL 2016: 1-4 - [c21]Peter A. Milder:
MEMOCODE 2016 design contest: K-means clustering. MEMOCODE 2016: 125-127 - [c20]Manoj Alwani, Han Chen, Michael Ferdman, Peter A. Milder:
Fused-layer CNN accelerators. MICRO 2016: 22:1-22:12 - [i1]Yongming Shen, Michael Ferdman, Peter A. Milder:
Maximizing CNN Accelerator Efficiency Through Resource Partitioning. CoRR abs/1607.00064 (2016) - 2015
- [c19]Michael K. Papamichael, Peter A. Milder
Nautilus: fast automated IP design space search using guided genetic algorithms. DAC 2015: 43:1-43:6 - [c18]Peter A. Milder:
MEMOCODE 2015 design contest: Continuous skyline computation. MEMOCODE 2015: 48-51 - 2014
- [c17]Jonah Caplan, Maria Isabel Mera, Peter A. Milder
Trade-offs in execution signature compression for reliable processor systems. DATE 2014: 1-6 - [c16]Peter A. Milder:
MEMOCODE 2014 design contest: k-Nearest Neighbors with Mahalanobis distance metric. MEMOCODE 2014: 198-200 - [c15]Rachid Bouziane, Peter A. Milder
Blind symbol synchronisation in direct-detection optical OFDM using virtual subcarriers. OFC 2014: 1-3 - 2012
- [j2]Peter A. Milder
Computer Generation of Hardware for Linear Digital Signal Processing Transforms. ACM Trans. Design Autom. Electr. Syst. 17(2): 15:1-15:33 (2012) - [c14]Marcela Zuluaga, Peter A. Milder
Computer generation of streaming sorting networks. DAC 2012: 1245-1253 - [c13]Berkin Akin, Peter A. Milder
Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. FCCM 2012: 188-191 - [c12]Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe:
Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). FPGA 2012: 271 - [c11]Robert Koutsoyannis, Peter A. Milder
Improving fixed-point accuracy of FFT cores in O-OFDM systems. ICASSP 2012: 1585-1588 - [c10]Marcela Zuluaga, Andreas Krause
"Smart" design space sampling to predict Pareto-optimal solutions. LCTES 2012: 119-128 - 2010
- [c9]Peter A. Milder
Hardware implementation of the discrete fourier transform with non-power-of-two problem size. ICASSP 2010: 1546-1549 - [c8]Eric S. Chung, Peter A. Milder
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? MICRO 2010: 225-236
2000 – 2009
- 2009
- [j1]Markus Püschel, Peter A. Milder
Permuting streaming data using RAMs. J. ACM 56(2): 10:1-10:34 (2009) - [c7]Peter A. Milder
Automatic generation of streaming datapaths for arbitrary fixed permutations. DATE 2009: 1118-1123 - 2008
- [c6]Peter A. Milder
Formal datapath representation and manipulation for implementing DSP transforms. DAC 2008: 385-390 - [c5]Franz Franchetti, Yevgen Voronenko, Peter A. Milder, Srinivas Chellappa, Marek R. Telgarsky, Hao Shen, Paolo D'Alberto, Frédéric de Mesmay, James C. Hoe, José M. F. Moura, Markus Püschel:
Domain-specific library generation for parallel software and hardware platforms. IPDPS 2008: 1-5 - 2007
- [c4]Paolo D'Alberto, Peter A. Milder
Generating FPGA-Accelerated DFT Libraries. FCCM 2007: 173-184 - [c3]Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Püschel:
FFT Compiler: from math to efficient hardware HLDVT invited short paper. HLDVT 2007: 137-139 - 2006
- [c2]Peter A. Milder
Fast and accurate resource estimation of automatically generated custom DFT IP cores. FPGA 2006: 211-220 - 2005
- [c1]Grace Nordin, Peter A. Milder
Automatic generation of customized discrete fourier transform IPs. DAC 2005: 471-474
Coauthor Index
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last updated on 2024-10-07 21:14 CEST by the dblp team
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