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Maura Turolla
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2010 – 2019
- 2011
- [c15]Donato Battaglino, Lorenzo Bracciale, Andrea Detti, Francesca Lo Piccolo, Andrea Bragagnini, Maura Turolla, Nicola Blefari-Melazzi:
A topic-based, publish-subscribe architecture for intermittently connected 802.15.4 networks. Future Network & Mobile Summit 2011: 1-8 - [c14]Lorenzo Bracciale
, Donato Battaglino, Andrea Detti
Delay performance of a Publish Subscribe system deployed over a memory-constrained, Delay Tolerant Network. Med-Hoc-Net 2011: 25-32 - [c13]Donato Battaglino, Lorenzo Bracciale
Design, implementation and performance evaluation of a publish-subscribe architecture for intermittently connected 802.15.4 networks. PE-WASUN 2011: 105-112 - [c12]Donato Battaglino, Lorenzo Bracciale
Campus++: A publish-subscribe architecture for intermittently connected 802.15.4 networks. SECON 2011: 164-166 - 2010
- [c11]Francesca Lo Piccolo, Donato Battaglino, Lorenzo Bracciale
On the IP support in IEEE 802.15.4 LR-WPANs: Self-configuring solutions for real application scenarios. Med-Hoc-Net 2010: 1-10
2000 – 2009
- 2007
- [c10]Elisa Alessio, Franco Fummi, Davide Quaglia
Modeling and simulation alternatives for the design of networked embedded systems. DATE 2007: 1030-1035 - 2006
- [c9]Franco Fummi, Davide Quaglia, Fabio Ricciato, Maura Turolla:
Modeling and simulation of mobile gateways interacting with wireless sensor networks. DATE Designers' Forum 2006: 106-111 - [c8]Fabio Ricciato, Maura Turolla, Antonio Varriale:
Finding the Mobile Trusted Element. ISSE 2006: 298-307 - 2005
- [c7]Franco Fummi, Stefano Martini, Giovanni Perbellini, Fabio Ricciato, Maura Turolla:
Embedded SW Design Issues for Distributed Applications on Mobile Terminals. MobiQuitous 2005: 507-509 - 2004
- [c6]Franco Fummi, Stefano Martini, Giovanni Perbellini, Massimo Poncino, Fabio Ricciato, Maura Turolla:
Heterogeneous Co-Simulation of Networked Embedded Systems. DATE 2004: 168-173 - 2000
- [c5]G. Bollano, S. Claretto, Enrica Filippi, Alessandro Torielli, Maura Turolla:
Merging hardware and software: intellectual property cores for Internet applications. CICC 2000: 537-540
1990 – 1999
- 1999
- [c4]R. Burger, G. Cesana, Maurizio Paolini, Maura Turolla, S. Vercelli:
A fully synthesizable parameterized Viterbi decoder. CICC 1999: 27-30 - [c3]G. Bollano, S. Claretto, L. Licciardi, Archille Montanaro, L. Pilati, Maura Turolla:
Intellectual property re-use and system emulation the keys to succeed the SoC challenge: a digital TV application. CICC 1999: 91-94 - [c2]Enrica Filippi, Archille Montanaro, Maurizio Paolini, Maura Turolla:
FPGA Design Experiences Using the CSELT VIP (TM) Library. FPGA 1999: 248 - 1998
- [c1]Enrica Filippi, L. Licciardi, Archille Montanaro, Maurizio Paolini, Maura Turolla, M. Taliercio:
The virtual chip set: a parametric IP library for system-on-a-chip design. CICC 1998: 97-100
Coauthor Index
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