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Philippe Cathelin
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2020 – today
- 2023
- [j9]Dayana A. Pino-Monroy
, Patrick Scheer, Mohamed Khalil Bouchoucha
Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge". IEEE Access 11: 39650 (2023) - [j8]Thomas Capelli-Mouvand
Third-Order Intermodulations Phase Shifting in Power Amplifiers for Spatial Filtering in Multi-Beam 5G mmW Phased Array. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3363-3367 (2023) - [c8]Daniel Gheysens, Alain Fleury, Stéphane Monfray, Frédéric Gianesello, Philippe Cathelin, Jean-François Robillard, David Troadec, Emmanuel Dubois:
Improving off-state capacitance of SOI-CMOS RF switches: how good are air microcavities? ESSDERC 2023: 109-112 - [c7]Mohamed Khalil Bouchoucha
Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies. ISCAS 2023: 1-5 - 2022
- [j7]Dayana A. Pino-Monroy
Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge. IEEE Access 10: 86270-86285 (2022) - [c6]Alexandre Flete, Christophe Viallon, Philippe Cathelin, Thierry Parra:
A Low-Loss 77 GHz Sub-Sampling Passive Mixer Integrated in a 28-nm CMOS Radar Receiver. ESSCIRC 2022: 305-308
2010 – 2019
- 2019
- [j6]Nikolaus Hammler
A Spectrum-Sensing DPD Feedback Receiver With 30× Reduction in ADC Acquisition Bandwidth and Sample Rate. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(9): 3340-3351 (2019) - 2018
- [j5]Fikre Tsigabu Gebreyohannes
All-Digital Transmitter Architecture Based on Two-Path Parallel 1-bit High Pass Filtering DACs. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3956-3969 (2018) - 2017
- [j4]Man-Chia Chen
A Pixel Pitch-Matched Ultrasound Receiver for 3-D Photoacoustic Imaging With Integrated Delta-Sigma Beamformer in 28-nm UTBB FD-SOI. IEEE J. Solid State Circuits 52(11): 2843-2856 (2017) - [c5]Reda Kasri, Eric A. M. Klumperink, Philippe Cathelin, Eric Toumier, Bram Nauta
A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers. CICC 2017: 1-4 - [c4]Man-Chia Chen, Aldo Pena Perez, Sri-Rajasekhar Kothapalli, Philippe Cathelin, Andreia Cathelin, Sanjiv Sam Gambhir, Boris Murmann
27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI. ISSCC 2017: 456-457 - 2013
- [c3]Lu Ye, Jiashu Chen, Lingkai Kong, Philippe Cathelin, Elad Alon, Ali M. Niknejad:
A digitally modulated 2.4GHz WLAN transmitter with integrated phase path and dynamic load modulation in 65nm CMOS. ISSCC 2013: 330-331 - 2010
- [j3]Francois Rivet
The Experimental Demonstration of a SASP-Based Full Software Radio Receiver. IEEE J. Solid State Circuits 45(5): 979-988 (2010) - [c2]Christian Izquierdo, Andreas Kaiser
Wide-band receiver architecture with flexible blocker filtering techniques. ICECS 2010: 894-897 - [c1]Fabien Robert, Antoine Diet, Martine Villegas, Fabio Epifano, Philippe Cathelin, Pascal Triaire, Geneviève Baudoin:
Architecture and filtering requirements for fully digital multi-radio transmitters. PIMRC 2010: 645-650
2000 – 2009
- 2008
- [j2]Francois Rivet
A Disruptive Receiver Architecture Dedicated to Software-Defined Radio. IEEE Trans. Circuits Syst. II Express Briefs 55-II(4): 344-348 (2008)
1990 – 1999
- 1998
- [j1]Philippe Cathelin, Andreia Cathelin, Xavier Saboret, Nicolas Krasnanski, Pierre Legras, Raed V. Moughabghab, Olivier Declerck, Marc Miodini, Frank Op't Eynde:
A fully integrated CMOS PM radio receiver for wristwatch calibration. IEEE J. Solid State Circuits 33(7): 1014-1022 (1998)
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