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Jintae Kim
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2020 – today
- 2024
- [j37]Jongho Kim
, Gyuchan Cho
A 7 GHz ERBW 1.1 GS/s 6-bit PVT Tolerant Asynchronous Charge-Injection SAR With Only 8.5 fF Input Capacitance in 28 nm CMOS. IEEE J. Solid State Circuits 59(3): 765-773 (2024) - [j36]Jintae Kim, Jehyuk Won
Optimal Switching Method Using Variable Additional On-Time Control for CRM-Operated Multicell Series-Parallel Converter. IEEE Trans. Ind. Electron. 71(1): 409-418 (2024) - [i2]Jintae Kim, Seungwon Yang, Seong-Gyun Jeong, Chang-Su Kim:
Forbes: Face Obfuscation Rendering via Backpropagation Refinement Scheme. CoRR abs/2407.14170 (2024) - 2023
- [j35]Hyeonsik Kim
A 9-Bit 500-ms/s 4-Stage Pipelined SAR ADC With Wide Input Common-Mode Range Using Replica-Biased Dynamic Residue Amplifiers. IEEE Access 11: 22531-22541 (2023) - [j34]Minhwi Kim, Jintae Kim, Min Seok Kim, Athip Boonsiriwit, Myungho Lee, Euihark Lee, Ho-Min Kang, Youn Suk Lee:
Comprehensive investigation of corrugated fiberboard boxes with edge vents for ambient loading of chinese cabbage: Part I - Computational fluid dynamics simulation and experimental validation. Comput. Electron. Agric. 215: 108376 (2023) - [j33]Azat Azamat
Partial Sum Quantization for Reducing ADC Size in ReRAM-Based Neural Network Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4897-4908 (2023) - [j32]Jongho Kim
A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch. IEEE Trans. Circuits Syst. II Express Briefs 70(9): 3228-3232 (2023) - [c29]Jongho Kim, Gyuchan Cho, Jintae Kim:
A 7GHz ERBW 1.1GS/s 6-bit PVT Tolerant Asynchronous CI-SAR with only 8.5fF Input Capacitance. CICC 2023: 1-2 - [c28]Jeonghyun Lee, Yoonseo Cho, Jintae Kim, Jaehyouk Choi:
A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter. CICC 2023: 1-2 - [c27]Hwankyu Song, Gyuchan Cho, Jintae Kim:
A 7.9-ENOB 1. 5GS/s Common-Mode and Temperature Insensitive Pipelined-SAR ADC with an On-Chip Temperature-Sensor-Based Stage-Gain Compensation. CICC 2023: 1-2 - [c26]Junheum Park, Jintae Kim
BiFormer: Learning Bilateral Motion Estimation via Bilateral Transformer for 4K Video Frame Interpolation. CVPR 2023: 1568-1577 - [i1]Junheum Park, Jintae Kim, Chang-Su Kim:
BiFormer: Learning Bilateral Motion Estimation via Bilateral Transformer for 4K Video Frame Interpolation. CoRR abs/2304.02225 (2023) - 2021
- [j31]Jongho Kim
An 8-bit Ring-Amplifier Based Mixed-Signal MAC Circuit With Full Digital Interface and Variable Accumulation Length. IEEE Access 9: 5887-5894 (2021) - [j30]Jae Sik Yoon
A 74-dB Dynamic-Range 625-kHz Bandwidth Second-Order Noise-Shaping SAR ADC Utilizing a Temperature-Compensated Dynamic Amplifier and a Digital Mismatch Calibration. IEEE Access 9: 39597-39607 (2021) - [j29]Sein Oh
An 85 dB DR 4 MHz BW Pipelined Noise-Shaping SAR ADC With 1-2 MASH Structure. IEEE J. Solid State Circuits 56(11): 3424-3433 (2021) - [c25]Jintae Kim, Junheum Park, Whan Choi, Chang-Su Kim:
Facial Video Frame Interpolation Combining Symmetric and Asymmetric Motions. APSIPA ASC 2021: 164-169 - [c24]Hyeonsik Kim
1.55mW 2GHz ERBW 7b 800MS/s 3-stage Pipelined SAR ADC in 28nm CMOS using a Kickback-Cancelling 7T-Dynamic Residue Amplifier with only 16fF Input Capacitance. A-SSCC 2021: 1-3 - [c23]Hyunjin Kim, Hyejin Kim, Jintae Kim, Daesik Hong:
A Novel Spectrum Partitioning Scheme for Dynamic Heterogeneous Networks. VTC Spring 2021: 1-6 - 2020
- [j28]Hyejin Kim
Dynamic TDD Systems for 5G and Beyond: A Survey of Cross-Link Interference Mitigation. IEEE Commun. Surv. Tutorials 22(4): 2315-2348 (2020) - [j27]Hyejin Kim
A Low-Complex SVD-Based F-OFDM. IEEE Trans. Wirel. Commun. 19(2): 1373-1385 (2020) - [c22]Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae:
A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure. CICC 2020: 1-4
2010 – 2019
- 2019
- [j26]Jiye Lim
A 20-kHz~16-MHz Programmable-Bandwidth 4th Order Active Filter Using Gain-Boosted Opamp With Negative Resistance in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 182-186 (2019) - [c21]Jae Sik Yoon, Jiyoon Hong, Jintae Kim:
A Digitally-Calibrated 70.98dB-SNDR 625kHz-Bandwidth Temperature-Tolerant 2nd-order Noise-Shaping SAR ADC in 65nm CMOS. A-SSCC 2019: 195-196 - [c20]Jintae Kim
The Tomlinson-Harashima Precoding-based FBMC-QAM System. ICEIC 2019: 1-5 - [c19]Natnael S. Zewge, Youngmin Kim, Jintae Kim, Jong-Hwan Kim:
Millimeter-Wave Radar and RGB-D Camera Sensor Fusion for Real-Time People Detection and Tracking. RiTA 2019: 93-98 - [c18]Jintae Kim, Youngmin Kim, Natnael S. Zewge, Jong-Hwan Kim:
A Robust Client-Server Architecture for Map Information Processing and Transmission for Distributed Visual SLAM. RiTA 2019: 99-105 - [c17]Jinkyo Jeong, Insik Jung, Jintae Kim
A New GFDM Receiver with Tabu Search. VTC Spring 2019: 1-5 - 2018
- [j25]Hyunmin Park
A 0.8-V Resistor-Based Temperature Sensor in 65-nm CMOS With Supply Sensitivity of 0.28 °C/V. IEEE J. Solid State Circuits 53(3): 906-912 (2018) - [j24]Ja-Hoon Jin
A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector. IEEE J. Solid State Circuits 53(10): 2994-3003 (2018) - [j23]Jintae Kim
A New Filter-Bank Multicarrier System: The Linearly Processed FBMC System. IEEE Trans. Wirel. Commun. 17(7): 4888-4898 (2018) - [j22]Jinkyo Jeong
Eigendecomposition-Based GFDM for Interference-Free Data Transmission and Pilot Insertion for Channel Estimation. IEEE Trans. Wirel. Commun. 17(10): 6931-6943 (2018) - 2017
- [j21]Joonki Kim, Kwonjong Lee, Jintae Kim
A Novel SCMA System for Coexistence of Active Users and Inactive Users. IEEE Commun. Lett. 21(12): 2730-2733 (2017) - [j20]Minyoung Yoon, Byungjoon Kim, Jintae Kim, Sangwook Nam:
Design Optimizaion of Gm-C Filters via Geometric Programming. IEICE Trans. Electron. 100-C(4): 407-415 (2017) - [j19]Soyeon Joo, Jintae Kim, SoYoung Kim:
Power-Supply Rejection Model Analysis of Capacitor-Less LDO Regulator Designs. IEICE Trans. Electron. 100-C(5): 504-512 (2017) - [c16]Wonsuk Chung, Beomju Kim, Insik Jung, Jintae Kim, Hyunkyu Yu, Sooyong Choi, Daesik Hong:
Synchronization Method for FBMC Systems. VTC Fall 2017: 1-5 - 2016
- [j18]Ikchan Jang, Yoonmyung Lee
Power-Performance Tradeoff Analysis of CML-Based High-Speed Transmitter Designs Using Circuit-Level Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(4): 540-550 (2016) - [j17]Yunsoo Park, Jintae Kim, Chulwoo Kim:
A Scalable Bandwidth Mismatch Calibration Technique for Time-Interleaved ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(11): 1889-1897 (2016) - [c15]Seungjae Lee
7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate. ISSCC 2016: 138-139 - [c14]Yosub Park, Jihaeng Heo, Jintae Kim
Effects of channel estimation errors on ultra-dense small cell networks. PIMRC 2016: 1-5 - 2015
- [j16]Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang
A 14 nm FinFET 128 Mb SRAM With VMIN Enhancement Techniques for Low-Power Applications. IEEE J. Solid State Circuits 50(1): 158-169 (2015) - [j15]Jintae Kim, Minjae Lee:
A Semiblind Digital-Domain Calibration of Pipelined A/D Converters via Convex Optimization. IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1375-1379 (2015) - [j14]Hokyu Lee, Aurangozeb
A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2371-2383 (2015) - [j13]Jintae Kim, Siamak Modjtahedi, Chih-Kong Ken Yang:
A Redundancy-Based Calibration Technique for High-Speed Digital-to-Analog Converters. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2395-2407 (2015) - [c13]Jaekwang Kim, Donggi Kim, Jeahoon Choi, Jintae Kim, Dongil Han:
A novel frame-rate up conversion using pseudo-true motion vector. ICCE 2015: 546-547 - 2014
- [j12]Seok Kim, Eun-Young Jin, Kee-Won Kwon, Jintae Kim, Jung-Hoon Chun:
A 6.4-Gb/s Voltage-Mode Near-Ground Receiver With a One-Tap Data and Edge DFE. IEEE Trans. Circuits Syst. II Express Briefs 61-II(6): 438-442 (2014) - [j11]Jintae Kim, Siamak Modjtahedi, Chih-Kong Ken Yang:
Flexible-Assignment Calibration Technique for Mismatch-Constrained Digital-to-Analog Converters. IEEE Trans. Very Large Scale Integr. Syst. 22(9): 1934-1944 (2014) - [c12]Taejoong Song, Woojin Rim, Jonghoon Jung, Giyong Yang
13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications. ISSCC 2014: 232-233 - 2013
- [j10]Hyeonho Song, Jintae Kim, Minjae Lee:
A low-power reference buffer with high PSRR and low crosstalk for time-interleaved ADCs. IEICE Electron. Express 10(16): 20130482 (2013) - [j9]Jintae Kim, Chester Sungchung Park:
A Calibration Technique for Multibit Stage Pipelined A/D Converters via Least-Squares Method. IEEE Trans. Instrum. Meas. 62(12): 3390-3392 (2013) - 2012
- [j8]Suntae Kim, Jintae Kim, Sooyong Park:
An active learning framework for object-oriented analysis and design. Comput. Appl. Eng. Educ. 20(3): 400-409 (2012) - [c11]Jaesang Cha, Jintae Kim, Yongsik Kang:
A Study about Implementation of BcN Using WiFi/ZigBee in Smart Water Grid. FGIT-MulGraB/BSBT/IUrC 2012: 159-162 - 2011
- [j7]Jintae Kim, S. Limotyrakis, Chih-Kong Ken Yang:
Multilevel Power Optimization of Pipelined A/D Converters. IEEE Trans. Very Large Scale Integr. Syst. 19(5): 832-845 (2011) - 2010
- [j6]Jintae Kim, Lieven Vandenberghe, Chih-Kong Ken Yang:
Convex Piecewise-Linear Modeling Method for Circuit Optimization via Geometric Programming. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(11): 1823-1827 (2010)
2000 – 2009
- 2009
- [c10]Suntae Kim, Jintae Kim, Sooyong Park, Dae-Kyoo Kim:
GARDIAN: A Tool for Validating Rule-Based Modeling Methods. QSIC 2009: 161-166 - 2008
- [j5]Jintae Kim, Sooyong Park, Vijayan Sugumaran
DRAMA: A framework for domain requirements analysis and modeling architectures in software product lines. J. Syst. Softw. 81(1): 37-55 (2008) - 2007
- [j4]Jintae Kim, Hamid Hatamkhani, Chih-Kong Ken Yang:
A Large-Swing Transformer-Boosted Serial Link Transmitter With > VDD Swing. IEEE J. Solid State Circuits 42(5): 1131-1142 (2007) - [c9]Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong Ken Yang:
Device-circuit co-optimization for mixed-mode circuit design via geometric programming. ICCAD 2007: 470-475 - 2006
- [j3]Jintae Kim, Sooyong Park, Vijayan Sugumaran
Improving use case driven analysis using goal and scenario authoring: A linguistics-based approach. Data Knowl. Eng. 58(1): 21-46 (2006) - [j2]Jintae Kim, Minseong Kim, Sooyong Park:
Goal and scenario based domain requirements analysis environment. J. Syst. Softw. 79(7): 926-938 (2006) - [c8]Jintae Kim, Hamid Hatamkhani, Chih-Kong Ken Yang:
An 8Gb/s Transformer-Boosted Transmitter with >V00 swing. ISSCC 2006: 283-292 - 2005
- [c7]Jungmin So, Jintae Kim, Indranil Gupta:
Cushion: autonomically adaptive data fusion in wireless sensor networks. MASS 2005 - 2004
- [j1]Jeongwook Kim, Jintae Kim, Sooyong Park, Vijayan Sugumaran
A multi-view approach for requirements analysis using goal and scenario. Ind. Manag. Data Syst. 104(9): 702-711 (2004) - [c6]Jintae Kim, Minseong Kim, Hwasil Yang, Sooyong Park:
A Method and Tool Support for Variant Requirements Analysis: Goal and Scenario Based Approach. APSEC 2004: 168-175 - [c5]Jintae Kim, Jaeseo Lee, Lieven Vandenberghe:
Techniques for improving the accuracy of geometric-programming based analog circuit design optimization. ICCAD 2004: 863-870 - [c4]Jintae Kim, Sooyong Park, Vijayan Sugumaran
A Linguistics-Based Approach for Use Case Driven Analysis Using Goal and Scenario Authoring. NLDB 2004: 159-170 - [c3]Jintae Kim, Steven Y. Ko, David M. Nicol, Xenofontas A. Dimitropoulos, George F. Riley:
A BGP Attack Against Traffic Engineering. WSC 2004: 318-326 - 2000
- [c2]Kenha Park, Jintae Kim, Sooyong Park:
Goal based agent-oriented software modeling. APSEC 2000: 320-324
1990 – 1999
- 1999
- [c1]Minjeong Kim, Seungyun Lee, Injae Park, Jintae Kim, Sooyong Park:
Agent-Oriented Software Modeling. APSEC 1999: 318-325
Coauthor Index
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