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BibTeX records: Kiyomi Naruke
@article{DBLP:journals/jssc/FukudaWMKSTKSTSOEINMMFYSNHTKMSYSSDWKMMNHLHMLMNH12, author = {Koichi Fukuda and Yoshihisa Watanabe and Eiichi Makino and Koichi Kawakami and Jumpei Sato and Teruo Takagiwa and Naoaki Kanagawa and Hitoshi Shiga and Naoya Tokiwa and Yoshihiko Shindo and Takeshi Ogawa and Toshiaki Edahiro and Makoto Iwai and Osamu Nagao and Junji Musha and Takatoshi Minamoto and Yuka Furuta and Kosuke Yanagidaira and Yuya Suzuki and Dai Nakamura and Yoshikazu Hosomura and Rieko Tanaka and Hiromitsu Komai and Mai Muramoto and Go Shikata and Ayako Yuminaka and Kiyofumi Sakurai and Manabu Sakai and Hong Ding and Mitsuyuki Watanabe and Yosuke Kato and Toru Miwa and Alex Mak and Masaru Nakamichi and Gertjan Hemink and Dana Lee and Masaaki Higashitani and Brian Murphy and Bo Lei and Yasuhiko Matsunaga and Kiyomi Naruke and Takahiko Hara}, title = {A 151-mm\({}^{\mbox{2}}\) 64-Gb 2 Bit/Cell {NAND} Flash Memory in 24-nm {CMOS} Technology}, journal = {{IEEE} J. Solid State Circuits}, volume = {47}, number = {1}, pages = {75--84}, year = {2012}, url = {https://doi.org/10.1109/JSSC.2011.2164711}, doi = {10.1109/JSSC.2011.2164711}, timestamp = {Sun, 30 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/FukudaWMKSTKSTSOEINMMFYSNHTKMSYSSDWKMMNHLHMLMNH12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/isscc/FukudaWMKSTKSTSEOINMMYSNHKFMTSYSSDWKMMNHLHMLMNH11, author = {Koichi Fukuda and Yoshihisa Watanabe and Eiichi Makino and Koichi Kawakami and Jumpei Sato and Teruo Takagiwa and Naoaki Kanagawa and Hitoshi Shiga and Naoya Tokiwa and Yoshihiko Shindo and Toshiaki Edahiro and Takeshi Ogawa and Makoto Iwai and Osamu Nagao and Junji Musha and Takatoshi Minamoto and Kosuke Yanagidaira and Yuya Suzuki and Dai Nakamura and Yoshikazu Hosomura and Hiromitsu Komai and Yuka Furuta and Mai Muramoto and Rieko Tanaka and Go Shikata and Ayako Yuminaka and Kiyofumi Sakurai and Manabu Sakai and Hong Ding and Mitsuyuki Watanabe and Yosuke Kato and Toru Miwa and Alex Mak and Masaru Nakamichi and Gertjan Hemink and Dana Lee and Masaaki Higashitani and Brian Murphy and Bo Lei and Yasuhiko Matsunaga and Kiyomi Naruke and Takahiko Hara}, title = {A 151mm\({}^{\mbox{2}}\) 64Gb {MLC} {NAND} flash memory in 24nm {CMOS} technology}, booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011, Digest of Technical Papers, San Francisco, CA, USA, 20-24 February, 2011}, pages = {198--199}, publisher = {{IEEE}}, year = {2011}, url = {https://doi.org/10.1109/ISSCC.2011.5746280}, doi = {10.1109/ISSCC.2011.5746280}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/FukudaWMKSTKSTSEOINMMYSNHKFMTSYSSDWKMMNHLHMLMNH11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/TanzawaUTSHTMTW02, author = {Toru Tanzawa and Akira Umezawa and Tadayuki Taura and Hitoshi Shiga and Tokumasa Hara and Yoshinori Takano and Takeshi Miyaba and Naoya Tokiwa and Kentaro Watanabe and Hiroshi Watanabe and Kazunori Masuda and Kiyomi Naruke and Hideo Kato and Shigeru Atsumi}, title = {A 44-mm\({}^{\mbox{2}}\) four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller}, journal = {{IEEE} J. Solid State Circuits}, volume = {37}, number = {11}, pages = {1485--1492}, year = {2002}, url = {https://doi.org/10.1109/JSSC.2002.802356}, doi = {10.1109/JSSC.2002.802356}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jssc/TanzawaUTSHTMTW02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/AtsumiKUBNYOOHYY94, author = {Shigeru Atsumi and Masao Kuriyama and Akira Umezawa and Hironori Banba and Kiyomi Naruke and Seiji Yamada and Yoichi Ohshima and Masamitsu Oshikiri and Yohei Hiura and Tomoko Yamane and Kuniyoshi Yoshikawa}, title = {A 16-Mb flash {EEPROM} with a new self-data-refresh scheme for a sector erase operation}, journal = {{IEEE} J. Solid State Circuits}, volume = {29}, number = {4}, pages = {461--469}, year = {1994}, url = {https://doi.org/10.1109/4.280696}, doi = {10.1109/4.280696}, timestamp = {Wed, 03 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/jssc/AtsumiKUBNYOOHYY94.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/jssc/UmezawaAKBINYOOST92, author = {Akira Umezawa and Shigeru Atsumi and Masao Kuriyama and Hironori Banba and Ken{-}ichi Imamiya and Kiyomi Naruke and Seiji Yamada and Etsushi Obi and Masamitsu Oshikiri and Tomoko Suzuki and Sumio Tanaka}, title = {A 5-V-only operation 0.6- mu m flash {EEPROM} with row decoder scheme in triple-well structure}, journal = {{IEEE} J. Solid State Circuits}, volume = {27}, number = {11}, pages = {1540--1546}, year = {1992}, url = {https://doi.org/10.1109/4.165334}, doi = {10.1109/4.165334}, timestamp = {Mon, 03 Feb 2025 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/jssc/UmezawaAKBINYOOST92.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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