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Jamison D. Collins
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2010 – 2019
- 2011
- [j3]Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Hong Jiang, Guei-Yuan Lueh, Thomas Piazza, Hong Wang:
Bothnia: a dual-personality extension to the Intel integrated graphics driver. ACM SIGOPS Oper. Syst. Rev. 45(1): 11-20 (2011) - [c18]Guilherme Ottoni, Gautham N. Chinya, Gerolf Hoflehner, Jamison D. Collins, Amit Kumar, Ethan Schuchman, David R. Ditzel, Ronak Singhal, Hong Wang:
AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs. Conf. Computing Frontiers 2011: 21 - 2010
- [c17]Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang:
Intel nehalem processor core made FPGA synthesizable. FPGA 2010: 3-12
2000 – 2009
- 2009
- [c16]Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang:
Intel® atomTM processor core made FPGA-synthesizable. FPGA 2009: 209-218 - 2008
- [c15]Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang:
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT 2008: 52-61 - [c14]Michael D. Linderman, Jamison D. Collins, Hong Wang, Teresa H. Meng:
Merge: a programming model for heterogeneous multi-core systems. ASPLOS 2008: 287-296 - [c13]Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz:
Processor Performance Modeling using Symbolic Simulation. ISPASS 2008: 127-138 - [c12]Benjamin C. Lee, Jamison D. Collins, Hong Wang, David M. Brooks:
CPR: Composable performance regression for scalable multiprocessor models. MICRO 2008: 270-281 - 2007
- [c11]Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Bernard Lint, Asit Mallick, Koichi Yamada, Hong Wang:
Sequencer virtualization. ICS 2007: 148-157 - [c10]Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh, Hong Wang:
EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. PLDI 2007: 156-166 - 2006
- [c9]Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan N. Rakvic, Hong Wang, John Paul Shen:
Multiple Instruction Stream Processor. ISCA 2006: 114-127 - 2004
- [j2]Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen:
Helper Threads via Virtual Multithreading. IEEE Micro 24(6): 74-82 (2004) - [c8]Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen:
Helper threads via virtual multithreading on an experimental itanium® 2 processor-based platform. ASPLOS 2004: 144-155 - [c7]Jamison D. Collins, Dean M. Tullsen
:
Clustered Multithreaded Architectures - Pursuing both IPC and Cycle Time. IPDPS 2004 - [c6]Jamison D. Collins, Dean M. Tullsen
Control Flow Optimization Via Dynamic Reconvergence Prediction. MICRO 2004: 129-140 - 2002
- [c5]Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen:
Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation. HPCA 2002: 187-196 - [c4]Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen
Pointer cache assisted prefetching. MICRO 2002: 62-73 - 2001
- [j1]Jamison D. Collins, Dean M. Tullsen
Runtime identification of cache conflict misses: The adaptive miss buffer. ACM Trans. Comput. Syst. 19(4): 413-439 (2001) - [c3]Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes
Speculative precomputation: long-range prefetching of delinquent loads. ISCA 2001: 14-25 - [c2]Jamison D. Collins, Dean M. Tullsen
Dynamic speculative precomputation. MICRO 2001: 306-317
1990 – 1999
- 1999
- [c1]Jamison D. Collins, Dean M. Tullsen
Hardware Identification of Cache Conflict Misses. MICRO 1999: 126-135
Coauthor Index
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