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Lukás Nagy
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2020 – today
- 2023
- [c31]Lukás Nagy, Michal Sovcik, Viera Stopjaková:
Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range. AFRICON 2023: 1-4 - 2022
- [c30]Daniel Arbet, Martin Kovác
, David Maljas, Lukás Nagy
High Power Supply Rejection LDO Regulator for Switching Applications. MIPRO 2022: 162-167 - [c29]Lukás Nagy
Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology. RADIOELEKTRONIKA 2022: 1-4 - 2021
- [j7]Miroslav Potocný
Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications. Sensors 21(17): 5721 (2021) - [c28]Lukás Nagy
EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method. AFRICON 2021: 1-4 - [c27]Lukás Nagy
EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design. DDECS 2021: 6-10 - [c26]Daniel Arbet, Miroslav Potocný
Fully On-Chip Low-Drop Regulator for Low-Power Applications. MIPRO 2021: 101-106 - [i2]Lukás Kohútka, Lukás Nagy, Viera Stopjaková:
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. CoRR abs/2110.01365 (2021) - [i1]Adam Hudec, Lukás Nagy, Martin Kovác, Viera Stopjaková:
Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology. CoRR abs/2110.11504 (2021) - 2020
- [c25]Lukás Nagy
Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology. DDECS 2020: 1-4 - [c24]Lukás Kohútka, Lukás Nagy
RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems. MECO 2020: 1-4 - [c23]Martin Kovác
Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems. MIPRO 2020: 77-82 - [c22]Lukás Nagy
Low-Leakage ESD Structures in 130nm CMOS Technology. RADIOELEKTRONIKA 2020: 1-4 - [e1]Lukás Nagy, Viera Stopjaková:
30th International Conference Radioelektronika, RADIOELEKTRONIKA 2020, Bratislava, Slovakia, April 15-16, 2020. IEEE 2020, ISBN 978-1-7281-6469-4 [contents]
2010 – 2019
- 2019
- [j6]Lukás Kohútka
A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems. J. Circuits Syst. Comput. 28(Supplement-1): 1940005:1-1940005:22 (2019) - [j5]Ales Chvála, Lukás Nagy
Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs. J. Circuits Syst. Comput. 28(Supplement-1): 1940009:1-1940009:14 (2019) - [c21]Lukás Nagy
Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology. AFRICON 2019: 1-5 - [c20]Lukás Kohútka
Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems. DDECS 2019: 1-6 - [c19]Martin Kovác
Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology. DDECS 2019: 1-4 - [c18]Lukás Nagy
Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology. DDECS 2019: 1-6 - [c17]Ales Chvála, Lukás Nagy
Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates. DTIS 2019: 1-4 - [c16]Viera Stopjaková, Martin Kovác
Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design. MIXDES 2019: 38-45 - 2018
- [c15]Daniel Arbet
Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. DDECS 2018: 45-50 - [c14]Lukás Nagy
Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology. DDECS 2018: 51-54 - [c13]Lukás Kohútka
A Novel Hardware-Accelerated Priority Queue for Real-Time Systems. DSD 2018: 46-53 - [c12]Ales Chvála, Lukás Nagy
Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell. DTIS 2018: 1-6 - 2017
- [j4]Daniel Arbet
130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications. J. Circuits Syst. Comput. 26(8): 1740003:1-1740003:19 (2017) - [j3]Juraj Brenkus, Viera Stopjaková
A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits. J. Circuits Syst. Comput. 26(8): 1740005:1-1740005:20 (2017) - [c11]Lukás Nagy
Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology. AFRICON 2017: 649-652 - 2016
- [c10]Daniel Arbet
Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology. DDECS 2016: 40-45 - [c9]Juraj Brenkus, Viera Stopjaková
Impedance calculation based method for AC fault analysis of mixed-signal circuits. DDECS 2016: 74-79 - [c8]Daniel Arbet
Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology. MIPRO 2016: 51-56 - 2015
- [c7]Lukás Nagy
Design of In AlN/GaN Heterostructure-Based Logic Cells. DDECS 2015: 83-86 - [c6]Daniel Arbet
Readout interface for capacitive MEMS microphone in CMOS technology. MIXDES 2015: 370-374 - 2014
- [j2]Lukás Nagy, Viera Stopjaková, Juraj Brenkus:
Current Sensing Completion Detection in Single-Rail Asynchronous Systems. Comput. Informatics 33(5): 1116-1138 (2014) - [c5]Roman Záluský, Daniela Duracková, Viera Stopjaková
Novel architecture of a digital neuron for FFNN employing special multiplication. ECAI 2014: 933-938 - [c4]Ales Chvála, Daniel Donoval
3-D electrothermal device/circuit simulation of DC-DC converter module in multi-die IC. ESSDERC 2014: 130-133 - 2013
- [j1]Lukás Nagy
Completion detection in dual-rail asynchronous systems by current-sensing. Microelectron. J. 44(6): 538-544 (2013) - 2012
- [c3]Lukás Nagy
Current sensing completion detection in dual-rail asynchronous systems. DDECS 2012: 38-41 - 2011
- [c2]Lukás Nagy
Current sensing methodology for completion detection in self-timed systems. DDECS 2011: 405-406 - 2010
- [c1]Lukás Nagy
Current Sensing Completion Detection in deep sub-micron technologies. DDECS 2010: 145-148
Coauthor Index
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