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Fu-Ching Yang
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2010 – 2019
- 2011
- [j4]Chun-Hung Lai, Fu-Ching Yang, Ing-Jer Huang:
A Trace-Capable Instruction Cache for Cost-Efficient Real-Time Program Trace Compression in SoC. IEEE Trans. Computers 60(12): 1665-1677 (2011) - [j3]Fu-Ching Yang, Yi-Ting Lin, Chung-Fu Kao, Ing-Jer Huang:
An On-Chip AHB Bus Tracer With Real-Time Compression and Dynamic Multiresolution Supports for SoC. IEEE Trans. Very Large Scale Integr. Syst. 19(4): 571-584 (2011) - 2010
- [j2]Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang:
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization. IEEE Trans. Very Large Scale Integr. Syst. 18(5): 732-741 (2010)
2000 – 2009
- 2009
- [c6]Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang:
A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization. ASP-DAC 2009: 721-726 - [c5]Chun-Hung Lai, Fu-Ching Yang, Chung-Fu Kao, Ing-Jer Huang:
A trace-capable instruction cache for cost efficient real-time program trace compression in SoC. DAC 2009: 136-141 - [c4]Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang:
A Reverse-encoding-based On-chip AHB Bus Tracer Supporting both Post-T and Pre-T Trace. ISCAS 2009: 788 - 2008
- [j1]Fu-Ching Yang, Wen-Kai Huang, Jing-Kun Zhong, Ing-Jer Huang:
Automatic Verification of External Interrupt Behaviors for Microprocessor Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(9): 1670-1683 (2008) - [c3]Fu-Ching Yang, Jing-Kun Zhong, Ing-Jer Huang:
Verifying external interrupts of embedded microprocessor in SoC with on-chip bus. ICCAD 2008: 372-377 - 2007
- [c2]Fu-Ching Yang, Ing-Jer Huang:
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools. ASP-DAC 2007: 902-907 - [c1]Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang:
Automatic Verification of External Interrupt Behaviors for Microprocessor Design. DAC 2007: 896-901
Coauthor Index
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