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Harry Sidiropoulos
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2020 – today
- 2022
- [j5]Sotirios Panagiotou, Harry Sidiropoulos, Dimitrios Soudris
, Mario Negrello, Christos Strydis
EDEN: A High-Performance, General-Purpose, NeuroML-Based Neural Simulator. Frontiers Neuroinformatics 16: 724336 (2022) - 2020
- [c15]Sotirios Panagiotou, Rene Miedema, Harry Sidiropoulos, Georgios Smaragdos, Christos Strydis
A novel simulator for extended Hodgkin-Huxley neural networks. BIBE 2020: 395-402
2010 – 2019
- 2019
- [j4]George Chatzikonstantis
Multinode implementation of an extended Hodgkin-Huxley simulator. Neurocomputing 329: 370-383 (2019) - 2018
- [c14]Harry Sidiropoulos, George Chatzikonstantis, Dimitrios Soudris
The VINEYARD Framework for Heterogeneous Cloud Applications: The BrainFrame Case. DASIP 2018: 70-75 - 2017
- [c13]Harry Sidiropoulos, Ioannis Koutras, Dimitrios Soudris, Kostas Siozios
Algorithmic and memory optimizations on multiple application mapping onto FPGAs. SAMOS 2017: 146-153 - [c12]George Chatzikonstantis, Diego Jiménez, Esteban Meneses, Christos Strydis
From Knights Corner to Landing: A Case Study Based on a Hodgkin-Huxley Neuron Simulator. ISC Workshops 2017: 363-375 - 2016
- [i1]Georgios Smaragdos, Georgios Chatzikonstantis, Rahul Kukreja, Harry Sidiropoulos, Dimitrios Rodopoulos, Ioannis Sourdis, Zaid Al-Ars, Christoforos Kachris, Dimitrios Soudris, Chris I. De Zeeuw, Christos Strydis:
BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations. CoRR abs/1612.01501 (2016) - 2015
- [c11]Kostas Siozios
TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools. ARC 2015: 103-114 - [c10]Peter Figuli, Carsten Tradowsky, Jose Martinez, Harry Sidiropoulos, Kostas Siozios
A Novel Concept for Adaptive Signal Processing on Reconfigurable Hardware. ARC 2015: 311-320 - 2014
- [j3]Harry Sidiropoulos, Kostas Siozios
A novel 3-D FPGA architecture targeting communication intensive applications. J. Syst. Archit. 60(1): 32-39 (2014) - [c9]Harry Sidiropoulos, Kostas Siozios
A Framework for Mapping Dynamic Virtual Kernels onto Heterogeneous Reconfigurable Platforms. IPDPS Workshops 2014: 170-175 - 2013
- [j2]Harry Sidiropoulos, Kostas Siozios
On supporting rapid exploration of memory hierarchies onto FPGAs. J. Syst. Archit. 59(2): 78-90 (2013) - [j1]Harry Sidiropoulos, Kostas Siozios
JITPR: A framework for supporting fast application's implementation onto FPGAs. ACM Trans. Reconfigurable Technol. Syst. 6(2): 7:1-7:12 (2013) - [c8]Harry Sidiropoulos, Efthymia Kazakou, Christoforos E. Economakos, George Economakos:
Efficient C level hardware design for floating point biomedical DSP applications. BIBE 2013: 1-4 - [c7]Harry Sidiropoulos, Peter Figuli, Kostas Siozios
A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization. FPL 2013: 1-4 - [c6]Christoforos E. Economakos, Harry Sidiropoulos, George Economakos:
Rapid prototyping of digital controllers using FPGAs and ESL/HLS design methodologies. ICAC 2013: 1-6 - 2012
- [c5]Harry Sidiropoulos, Kostas Siozios
On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation. IPDPS Workshops 2012: 328-335 - 2011
- [c4]Harry Sidiropoulos, Kostas Siozios
A Framework for Architecture-Level Exploration of Communication Intensive Applications onto 3-D FPGAs. FPL 2011: 30-33 - [c3]Harry Sidiropoulos, Kostas Siozios
A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs. FPL 2011: 238-243 - [c2]Harry Sidiropoulos, Kostas Siozios
A Framework for Architecture-Level Exploration of 3-D FPGA Platforms. PATMOS 2011: 298-307 - 2010
- [c1]Harry Sidiropoulos, Kostas Siozios
NAROUTO: An open-source framework for supporting architecture-level exploration at heterogeneous FPGAS. ICECS 2010: 527-530
Coauthor Index
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