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Mojtaba Mahdavi 0001
Person information
- affiliation: Ericsson, Lund, Sweden
- affiliation (former): Lund University, Department of Electrical and Information Technology, Sweden
Other persons with the same name
- Mojtaba Mahdavi — disambiguation page
- Mojtaba Mahdavi 0002
— University of Isfahan, Department of Information Technology Engineering, Iran
- Mojtaba Mahdavi 0003
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2020 – today
- 2024
- [c17]Mojtaba Mahdavi:
Towards Low-Complexity Hardware Realization of Adaptive Filters. BlackSeaCom 2024: 368-375 - [c16]Mojtaba Mahdavi:
Memristor-Based Square Root Computation for Signal Processing Applications. BlackSeaCom 2024: 376-381 - [c15]Mojtaba Mahdavi:
Multidimensional Euclidean Distance Calculation using In-Memory Computing. CITS 2024: 1-8 - [c14]Mojtaba Mahdavi:
Efficient Hardware Acceleration of Mean Squared Error Calculation Through In-Memory Computing. COINS 2024: 1-6 - [c13]Mojtaba Mahdavi:
Reconfigurable Band-Stop Filter Design using Computing In Memory. SmartGridComm 2024: 478-484 - [c12]Mojtaba Mahdavi:
Hardware Realization of Vector and Matrix Norm Calculation for Signal Processing Applications. WINCOM 2024: 1-7 - [c11]Mojtaba Mahdavi:
Channel Estimation using Processing In Memory Based on System Identification Technique. WINCOM 2024: 1-8 - 2023
- [c10]Mojtaba Mahdavi:
A Novel Memristive-Based Data Reordering Scheme. DSD 2023: 626-633 - [c9]Mojtaba Mahdavi:
Towards Low-Complexity, Fully Parallel and Flexible Hardware Realization of DCT/IDCT. ICSPCS 2023: 1-7 - [c8]Mojtaba Mahdavi:
Fully Parallel, Flexible, and Conflict-Free Interleaver Design using Processing in Memory. NEWCAS 2023: 1-2 - [c7]Mojtaba Mahdavi:
Reordering-Less FFT: A Novel FFT Processor with Parallel Input/Output in Normal Order. SoftCOM 2023: 1-6 - [c6]Mojtaba Mahdavi:
Fully Parallel and Reconfigurable Realization of DFT/IDFT using In-Memory Computing. WINCOM 2023: 1-8 - 2022
- [j5]Mojtaba Mahdavi
Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs. IEEE Trans. Circuits Syst. I Regul. Pap. 69(5): 1962-1975 (2022) - 2021
- [b1]Mojtaba Mahdavi:
Baseband Processing for 5G and Beyond: Algorithms, VLSI Architectures, and Co-design. Lund University, Sweden, 2021 - [c5]Mojtaba Mahdavi, Liang Liu
Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes. ISTC 2021: 1-5 - [c4]Mojtaba Mahdavi, Muhammad Umar Farooq, Liang Liu
The Effect of Coupling Memory and Block Length on Spatially Coupled Serially Concatenated Codes. VTC Spring 2021: 1-7 - 2020
- [j4]Mojtaba Mahdavi
Angular-Domain Massive MIMO Detection: Algorithm, Implementation, and Design Tradeoffs. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 1948-1961 (2020) - [i1]Mojtaba Mahdavi, Muhammad Umar Farooq, Liang Liu, Ove Edfors, Viktor Öwall, Michael Lentmaier:
The Effect of Coupling Memory and Block Length on Spatially Coupled Serially Concatenated Codes. CoRR abs/2006.13396 (2020)
2010 – 2019
- 2019
- [j3]Mojtaba Mahdavi
A Low Latency FFT/IFFT Architecture for Massive MIMO Systems Utilizing OFDM Guard Bands. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(7): 2763-2774 (2019) - [c3]Mojtaba Mahdavi, Ove Edfors
A VLSI Implementation of Angular-Domain Massive MIMO Detection. ISCAS 2019: 1-5 - 2018
- [j2]Mahdi Shabany
A 70 pJ/b configurable 64-QAM soft MIMO detector. Integr. 63: 74-86 (2018) - [c2]Mojtaba Mahdavi, Ove Edfors
A Low Complexity Massive MIMO Detection Scheme Using Angular-Domain Processing. GlobalSIP 2018: 181-185 - 2017
- [j1]Mahdi Shabany, R. Doostnejad, Mojtaba Mahdavi
A 38 pJ/b Optimal Soft-MIMO Detector. IEEE Trans. Circuits Syst. II Express Briefs 64-II(9): 1062-1066 (2017) - [c1]Mojtaba Mahdavi, Ove Edfors
A low latency and area efficient FFT processor for massive MIMO systems. ISCAS 2017: 1-4
Coauthor Index
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last updated on 2024-12-10 20:48 CET by the dblp team
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