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Jocelyn Sérot
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2020 – today
- 2024
- [c36]Loïc Sylvestre, Jocelyn Sérot, Emmanuel Chailloux:
Hardware Implementation of OCaml Using a Synchronous Functional Language. PADL 2024: 151-168 - 2023
- [j17]Loïc Sylvestre, Emmanuel Chailloux, Jocelyn Sérot:
Accelerating OCaml Programs on FPGA. Int. J. Parallel Program. 51(2-3): 186-207 (2023) - [c35]Loïc Sylvestre, Emmanuel Chailloux, Jocelyn Sérot:
Work-in-Progress: mixing computation and interaction on FPGA. EMSOFT 2023: 5-6 - 2022
- [c34]Loïc Sylvestre, Jocelyn Sérot, Emmanuel Chailloux:
A Virtual Machine Approach for High-level FPGA Programming. FCCM 2022: 1 - 2020
- [c33]Jocelyn Sérot:
HoCL: High level specification of dataflow graphs. IFL 2020: 11-22
2010 – 2019
- 2019
- [j16]Claudio Rubattu, Francesca Palumbo, Carlo Sau, Rubén Salvador, Jocelyn Sérot, Karol Desnos, Luigi Raffo, Maxime Pelcat:
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators. IEEE Embed. Syst. Lett. 11(3): 69-72 (2019) - [c32]Jocelyn Sérot, François Berry:
The CAPH Language, Ten Years After. SAMOS 2019: 336-347 - 2018
- [j15]Luca Maggiani, Cédric Bourrasset, Jean-Charles Quinton, François Berry, Jocelyn Sérot:
Bio-inspired heterogeneous architecture for real-time pedestrian detection applications. J. Real Time Image Process. 14(3): 535-548 (2018) - [i4]Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry:
Accelerating CNN inference on FPGAs: A Survey. CoRR abs/1806.01683 (2018) - 2017
- [j14]Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, Cédric Bourrasset, François Berry:
Tactics to Directly Map CNN Graphs on Embedded FPGAs. IEEE Embed. Syst. Lett. 9(4): 113-116 (2017) - [i3]Kamel Abdelouahab, Cédric Bourrasset, Maxime Pelcat, François Berry, Jean-Charles Quinton, Jocelyn Sérot:
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. CoRR abs/1703.09779 (2017) - [i2]Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry, Cédric Bourrasset, Jean-Charles Quinton:
Hardware Automated Dataflow Deployment of CNNs. CoRR abs/1705.04543 (2017) - [i1]Kamel Abdelouahab, Maxime Pelcat, Cédric Bourrasset, François Berry, Jocelyn Sérot:
Tactics to Directly Map CNN graphs on Embedded FPGAs. CoRR abs/1712.04322 (2017) - 2016
- [j13]Cédric Bourrasset, Luca Maggiani, Jocelyn Sérot, François Berry:
Dataflow object detection system for FPGA-based smart camera. IET Circuits Devices Syst. 10(4): 280-291 (2016) - [j12]Jocelyn Sérot, François Berry, Cédric Bourrasset:
High-level dataflow programming for real-time image processing on smart cameras. J. Real Time Image Process. 12(4): 635-647 (2016) - [c31]Kamel Abdelouahab, Cédric Bourrasset, Maxime Pelcat, François Berry, Jean-Charles Quinton, Jocelyn Sérot:
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. ICDSC 2016: 69-75 - [c30]Sébastien Caux, Edouard Hendrickx, François Berry, Maxime Pelcat, Jocelyn Sérot:
Demo GPStudio: a toolchain for FPGA-based Smart Cameras: Demo Paper. ICDSC 2016: 214-215 - 2015
- [c29]Luca Maggiani, Cédric Bourrasset, François Berry, Jocelyn Sérot, Matteo Petracca, Claudio Salvadori:
Parallel image gradient extraction core for FPGA-based smart cameras. ICDSC 2015: 128-133 - 2014
- [c28]Jocelyn Sérot, François Berry:
High-Level Dataflow Programming for Reconfigurable Computing. SBAC-PAD (Workshops) 2014: 72-77 - 2013
- [c27]Cédric Bourrasset, Luca Maggiani, Jocelyn Sérot, François Berry, Paolo Pagano:
DreamCAM: A FPGA-based platform for smart camera networks. ICDSC 2013: 1-2 - [c26]Cédric Bourrasset, Luca Maggiani, Jocelyn Sérot, François Berry, Paolo Pagano:
Distributed FPGA-based smart camera architecture for computer vision applications. ICDSC 2013: 1-2 - [c25]Cédric Bourrasset, Jocelyn Sérot, François Berry:
FPGA-based smart camera mote for pervasive wireless network. ICDSC 2013: 1-6 - 2012
- [c24]Jocelyn Sérot, Greg J. Michaelson:
Harnessing parallelism in FPGAs using the hume language. FHPC@ICFP 2012: 27-36 - 2011
- [c23]Jocelyn Sérot, François Berry, Sameer Ahmed:
Implementing Stream-Processing Applications on FPGAs: A DSL-Based Approach. FPL 2011: 130-137 - 2010
- [c22]Nicolas Roudel, François Berry, Jocelyn Sérot, Laurent Eck:
A New High-Level Methodology for Programming FPGA-Based Smart Camera. DSD 2010: 573-578
2000 – 2009
- 2009
- [j11]Álvaro Hernández, Jesús Ureña, Manuel Mazo, Juan Jesús García, Ana Jiménez, José Antonio Jiménez, María del Carmen Pérez, Fernando J. Álvarez, Carlos De Marziani, Jean-Pierre Dérutin, Jocelyn Sérot:
Advanced Adaptive Sonar for Mapping Applications. J. Intell. Robotic Syst. 55(1): 81-106 (2009) - [j10]Joel Falcou, Jocelyn Sérot:
Une bibliothèque métaprogrammée pour la programmation parallèle. Tech. Sci. Informatiques 28(5): 645-675 (2009) - 2008
- [c21]Joel Falcou, Jocelyn Sérot, Lucien Pech, Jean-Thierry Lapresté:
Meta-programming Applied to Automatic SMP Parallelization of Linear Algebra Code. Euro-Par 2008: 729-738 - [c20]Jocelyn Sérot, Joel Falcou:
Functional Meta-programming for Parallel Skeletons. ICCS (1) 2008: 154-163 - 2007
- [c19]Fabio Dias, François Berry, Jocelyn Sérot, François Marmoiton:
Hardware, Design and Implementation Issues on a Fpga-Based Smart Camera. ICDSC 2007: 20-26 - [c18]Fabio Dias, François Berry, Jocelyn Sérot, François Marmoiton:
A Configurable Window-Based Processing Element for Image Processing on Smart Cameras. MVA 2007: 276-280 - [c17]Joel Falcou, Jocelyn Sérot:
Formal Semantics Applied to the Implementation of a Skeleton-Based Parallel Programming Library. PARCO 2007: 243-252 - 2006
- [j9]Joel Falcou, Jocelyn Sérot, Thierry Chateau, Jean-Thierry Lapresté:
Quaff: efficient C++ design for parallel skeletons. Parallel Comput. 32(7-8): 604-615 (2006) - [c16]Kevin Hammond, Christian Ferdinand, Reinhold Heckmann, Roy Dyckhoff, Martin Hofmann, Steffen Jost, Hans-Wolfgang Loidl, Greg Michaelson, Robert F. Pointon, Norman Scaife, Jocelyn Sérot, Andy Wallace:
Towards Formally Verifiable WCET Analysis for a Functional Programming Language. WCET 2006 - 2005
- [j8]Rémi Coudarcher, Florent Duculty, Jocelyn Sérot, Frédéric Jurie, Jean-Pierre Dérutin, Michel Dhome:
Managing Algorithmic Skeleton Nesting Requirements in Realistic Image Processing Applications: The Case of the SKiPPER-II Parallel Programming Environment's Operating Model. EURASIP J. Adv. Signal Process. 2005(7): 1005-1023 (2005) - [j7]Joel Falcou, Jocelyn Sérot:
E.V.E., An Object Oriented SIMD Library. Scalable Comput. Pract. Exp. 6(4) (2005) - [c15]Joel Falcou, Jocelyn Sérot, Thierry Chateau, Frédéric Jurie:
A Parallel Implementation of a 3D Reconstruction Algorithm for Real-Time Vision. PARCO 2005: 663-670 - [c14]Kevin Hammond, Roy Dyckhoff, Christian Ferdinand, Reinhold Heckmann, Martin Hofmann, Steffen Jost, Hans-Wolfgang Loidl, Greg Michaelson, Robert F. Pointon, Norman Scaife, Jocelyn Sérot, Andy Wallace:
The Embounded project (project start paper). Trends in Functional Programming 2005: 195-210 - 2004
- [c13]Joel Falcou, Jocelyn Sérot:
EVE, an Object Oriented SIMD Library. International Conference on Computational Science 2004: 314-321 - [c12]Greg Michaelson, Kevin Hammond, Jocelyn Sérot:
FSM-Hume: programming resource-limited systems using bounded automata. SAC 2004: 1455-1461 - 2003
- [j6]Álvaro Hernández, Jesús Ureña, Daniel Hernanz, Juan Jesús García, Manuel Mazo, Jean-Pierre Dérutin, Jocelyn Sérot, Sira E. Palazuelos:
Real-time implementation of an efficient Golay correlator (EGC) applied to ultrasonic sensorial systems. Microprocess. Microsystems 27(8): 397-406 (2003) - [c11]Pedro A. Revenga, Jocelyn Sérot, José Luis Lázaro, Jean-Pierre Dérutin:
A Beowulf-Class Architecture Proposal for Real-Time Embedded Vision. IPDPS 2003: 232 - [c10]Joel Falcou, Jocelyn Sérot:
CamlG4 : une bibliothèque de calcul parallèle pour Objective Caml. JFLA 2003: 139-152 - [c9]Greg Michaelson, Kevin Hammond, Jocelyn Sérot:
FSM-Hume is finite state. Trends in Functional Programming 2003: 19-28 - 2002
- [j5]Jocelyn Sérot, Dominique Ginhac:
Skeletons for parallel image processing: an overview of the SKIPPER project. Parallel Comput. 28(12): 1685-1708 (2002) - 2001
- [j4]Jocelyn Sérot, Dominique Ginhac, Roland Chapuis, Jean-Pierre Dérutin:
Fast prototyping of parallel-vision applications using functional skeletons. Mach. Vis. Appl. 12(6): 271-290 (2001) - [j3]Jocelyn Sérot:
Tagged-Token Data-Flow for Skeletons. Parallel Process. Lett. 11(4): 377-392 (2001) - [c8]Rémi Coudarcher, Jocelyn Sérot, Jean-Pierre Dérutin:
Implementation of a Skeleton-Based Parallel Programming Environment Supporting Arbitrary Nesting. HIPS 2001: 71-85 - [c7]Rémi Coudarcher, Jocelyn Sérot, Jean-Pierre Dérutin:
Implementation of a Skeleton-based Parallel Programming Environment Supporting Arbitrary Nesting. IPDPS 2001: 104 - 2000
- [c6]Jocelyn Sérot:
CAMLFLOW: a CAML to data-flow graph translator. Scottish Functional Programming Workshop 2000: 129-144
1990 – 1999
- 1999
- [c5]Jocelyn Sérot, Dominique Ginhac, Jean-Pierre Dérutin:
SKiPPER: A Skeleton-Based Parallel Programming Environment for Real-Time Image Processing Applications. PaCT 1999: 296-305 - [p1]Jocelyn Sérot:
Explicit Parallelism. Research Directions in Parallel Functional Programming 1999: 379-396 - 1998
- [c4]Dominique Ginhac, Jocelyn Sérot, Jean-Pierre Dérutin:
Fast Prototyping of Image Processing Applications Using Functional Skeletons on a MIMD-DM Architecture. MVA 1998: 468-471 - 1997
- [c3]Jocelyn Sérot:
Embodying Parallel Functional Skeletons: An Experimental Implementation on Top of MPI. Euro-Par 1997: 629-633 - 1995
- [j2]Jocelyn Sérot, Georges Quénot, Bertrand Y. Zavidovique:
A Visual Dataflow Programming Environment for a Real Time Parallel Vision Machine. J. Vis. Lang. Comput. 6(4): 327-347 (1995) - 1993
- [j1]Jocelyn Sérot, Georges Quénot, Bertrand Y. Zavidovique:
Functional programming on a dataflow architecture: Applications in real-time image processing. Mach. Vis. Appl. 7(1): 44-56 (1993) - [c2]Georges Quénot, C. Coutelle, Jocelyn Sérot, Bertrand Y. Zavidovique:
A wavefront array processor for on the fly processing of digital video streams. ASAP 1993: 101-108 - [c1]Jocelyn Sérot, Georges Quénot, Bertrand Y. Zavidovique:
A Functional Data-flow Architecture Dedicated to Real-time Image Processing. Architectures and Compilation Techniques for Fine and Medium Grain Parallelism 1993: 129-140
Coauthor Index
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last updated on 2024-10-07 21:18 CEST by the dblp team
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