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Guojie Luo
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- affiliation: Peking University, Beijing, China
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2020 – today
- 2024
- [j23]Sunan Zou
, Jiaxi Zhang, Bizhao Shi, Guojie Luo
PowerSyn: A Logic Synthesis Framework With Early Power Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 203-216 (2024) - [j22]Tuo Dai
Weave: Abstraction and Integration Flow for Accelerators of Generated Modules. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(3): 854-867 (2024) - [c86]Xingquan Li
iEDA: An Open-source infrastructure of EDA. ASPDAC 2024: 77-82 - [c85]Tuo Dai
G2PM: Performance Modeling for ACAP Architecture with Dual-Tiered Graph Representation Learning. DAC 2024: 13:1-13:6 - [c84]Bizhao Shi
PT-Map: Efficient Program Transformation Optimization for CGRA Mapping. DAC 2024: 14:1-14:6 - [c83]Sunan Zou
PONO: Power Optimization with Near Optimal SMT-based Sub-circuit Generation. DAC 2024: 41:1-41:6 - [c82]Tuo Dai, Bizhao Shi, Guojie Luo:
WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on ACAP. DATE 2024: 1-6 - [c81]Zexi Li, Haoran Jin, Kuncai Zhong, Guojie Luo, Runsheng Wang, Weikang Qian:
SCGen: A Versatile Generator Framework for Agile Design of Stochastic Circuits. DATE 2024: 1-6 - [c80]Ruiyang Ma, Huatao Zhao, Jiayi Huang, Shijian Zhang, Guojie Luo:
An Endeavor to Industrialize Hardware Fuzzing: Automating NoC Verification in UVM. DATE 2024: 1-2 - [c79]Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo:
BESWAC: Boosting Exact Synthesis via Wiser SAT Solver Call. DATE 2024: 1-6 - [c78]Bizhao Shi
ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA. Euro-Par (1) 2024: 61-76 - [c77]Sunan Zou
Incremental SAT-based Exact Synthesis. ACM Great Lakes Symposium on VLSI 2024: 158-163 - [c76]Xinming Wei, Jiaxi Zhang, Guojie Luo:
Rethinking IC Layout Vulnerability: Simulation-Based Hardware Trojan Threat Assessment with High Fidelity. SP 2024: 3789-3804 - [i12]Tuo Dai, Bizhao Shi, Guojie Luo:
WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on the Versal ACAP Architecture. CoRR abs/2401.16792 (2024) - [i11]Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou:
The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. CoRR abs/2403.07257 (2024) - [i10]Shan Yu, Yair Censor, Guojie Luo:
Floorplanning with I/O assignment via feasibility-seeking and superiorization methods. CoRR abs/2406.03165 (2024) - [i9]Ruiyang Ma, Yuxin Yang, Ziqian Liu, Jiaxi Zhang, Min Li, Junhua Huang, Guojie Luo:
VerilogReader: LLM-Aided Hardware Test Generation. CoRR abs/2406.04373 (2024) - 2023
- [j21]Bizhao Shi
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 3910-3924 (2023) - [j20]Zhengzheng Ma
An Intermediate-Centric Dataflow for Transposed Convolution Acceleration on FPGA. ACM Trans. Embed. Comput. Syst. 22(6): 92:1-92:22 (2023) - [c75]Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin:
OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. ASICON 2023: 1-4 - [c74]Xinming Wei
GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs. DAC 2023: 1-6 - [c73]Jiaxi Zhang, Shenggen Zheng
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions. DATE 2023: 1-6 - [c72]Tuo Dai
Weave: Abstraction for Accelerator Integration of Generated Modules. FPGA 2023: 51 - [c71]Zhengzheng Ma, Guojie Luo:
An Efficient Dataflow for Convolutional Generative Models. ICFPT 2023: 53-59 - [c70]Bizhao Shi, Jieran Zhang, Guojie Luo:
F-TFM: Accelerating Total Focusing Method for Ultrasonic Array Imaging on FPGA. ICFPT 2023: 280-281 - [c69]Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
Fast Exact NPN Classification with Influence-Aided Canonical Form. ICCAD 2023: 1-9 - [c68]Xiong Wang
RF-SIFTER: Sifting Signals at Layer-0.5 to Mitigate Wideband Cross-Technology Interference for IoT. MobiCom 2023: 12:1-12:14 - [i8]Jiaxi Zhang, Shenggen Zheng, Liwei Ni, Huawei Li, Guojie Luo:
Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions. CoRR abs/2301.12122 (2023) - [i7]Shan Yu, Yair Censor, Ming Jiang, Guojie Luo:
Per-RMAP: Feasibility-Seeking and Superiorization Methods for Floorplanning with I/O Assignment. CoRR abs/2304.06698 (2023) - [i6]Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin:
OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. CoRR abs/2306.16665 (2023) - [i5]Xingquan Li
iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library. CoRR abs/2308.01857 (2023) - [i4]Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng:
Fast Exact NPN Classification with Influence-aided Canonical Form. CoRR abs/2308.12311 (2023) - [i3]Liwei Ni, Zonglin Yang, Jiaxi Zhang, Changhong Feng, Jianhua Liu, Guojie Luo, Huawei Li, Biwei Xie, Xingquan Li:
MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA. CoRR abs/2312.14541 (2023) - 2022
- [j19]Chenren Xu
The Case for FPGA-Based Edge Computing. IEEE Trans. Mob. Comput. 21(7): 2610-2619 (2022) - [c67]Jiaxi Zhang, Qiuyang Gao, Yijiang Guo, Bizhao Shi, Guojie Luo:
EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation: (Invited Paper). ASP-DAC 2022: 647-653 - [c66]Yijiang Guo, Xinming Wei, Jiaxi Zhang, Guojie Luo:
Purlin: A Versatile Toolkit for the Generation and Simulation of On-Chip Networks. ICCD 2022: 385-393 - [c65]Gauthaman Murali
ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. ISPD 2022: 97-104 - 2021
- [j18]Weicheng Wang
Feasibility study of practical vital sign detection using millimeter-wave radios. CCF Trans. Pervasive Comput. Interact. 3(4): 436-452 (2021) - [j17]Feng Wang, Guojie Luo, Guang-Yu Sun, Yuhao Wang, Dimin Niu, Hongzhong Zheng:
Area Efficient Pattern Representation of Binary Neural Networks on RRAM. J. Comput. Sci. Technol. 36(5): 1155-1166 (2021) - [j16]Wentai Zhang
FPGA Acceleration for 3-D Low-Dose Tomographic Reconstruction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 666-679 (2021) - [j15]Feng Wang
STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 864-877 (2021) - [j14]Minghua Shen
Combining Static and Dynamic Load Balance in Parallel Routing for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(9): 1850-1863 (2021) - [j13]Minghua Shen
Coarse-Grained Parallel Routing With Recursive Partitioning for FPGAs. IEEE Trans. Parallel Distributed Syst. 32(4): 884-899 (2021) - [c64]Yijiang Guo, Jiarui Wang, Jiaxi Zhang, Guojie Luo:
Formulating Data-arrival Synchronizers in Integer Linear Programming for CGRA Mapping. DAC 2021: 943-948 - [c63]Zhe Zhou
BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices. DAC 2021: 1009-1014 - [c62]Linjun Qiao, Guojie Luo, Wentai Zhang
FPGA-accelerated Iterative Reconstruction for Transmission Electron Tomography. FCCM 2021: 152-156 - [c61]Zhengzheng Ma, Guojie Luo:
TOCO: A Systolic Network for Efficient Transposed Convolutions with Output-Reuse Paths. FCCM 2021: 275 - [c60]Jiaxi Zhang, Liwei Ni, Shenggen Zheng
Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning. ICCAD 2021: 1-9 - [c59]Feng Wang, Guangyu Sun, Guojie Luo:
SSR: A Skeleton-based Synthesis Flow for Hybrid Processing-in-RRAM Modes. ICCAD 2021: 1-9 - [c58]Jiaxi Zhang, Tao Yang, Qingzheng Li, Bo Zhou, Yang Yang, Guojie Luo, Jianping Shi:
An FPGA-Based Neural Network Overlay for ADAS Supporting Multi-Model and Multi-Mode. ISCAS 2021: 1-5 - [i2]Zhe Zhou, Bizhao Shi
BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices. CoRR abs/2104.06214 (2021) - [i1]Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao Liu, Xiangfu Zou, Feng Wang, Guojie Luo:
Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning. CoRR abs/2111.06213 (2021) - 2020
- [j12]Minghua Shen
Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(2): 411-423 (2020) - [j11]Minghua Shen
EEPC: A Framework for Energy-Efficient Parallel Control of Connected Cars. IEEE Trans. Parallel Distributed Syst. 31(1): 64-79 (2020) - [c57]Zhe Zhou
Hardware-assisted Service Live Migration in Resource-limited Edge Computing Systems. DAC 2020: 1-6 - [c56]Wentai Zhang
Evaluating Low-Memory GEMMs for Convolutional Neural Network Inference on FPGAs. FCCM 2020: 28-32 - [c55]Shuang Wen, Guojie Luo:
FPGA-accelerated Automatic Alignment for Three-dimensional Tomography. FCCM 2020: 172-176 - [c54]Linjun Qiao, Guojie Luo, Wentai Zhang
FPGA Acceleration of Ray-Based Iterative Algorithm for 3D Low-Dose CT Reconstruction. FPL 2020: 98-102 - [c53]Zhe Zhou, Bingzhe Wu, Zheng Liang, Guangyu Sun, Chenren Xu, Guojie Luo:
SaFace: Towards Scenario-aware Face Recognition via Edge Computing System. HotEdge 2020 - [c52]Feng Wang, Liren Zhu
Dual-Output LUT Merging during FPGA Technology Mapping. ICCAD 2020: 132:1-132:9
2010 – 2019
- 2019
- [j10]Dajiang Liu
Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(12): 2271-2283 (2019) - [j9]Minghua Shen
Exploring GPU-Accelerated Routing for FPGAs. IEEE Trans. Parallel Distributed Syst. 30(6): 1331-1345 (2019) - [c51]Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Peng Huang, Jinfeng Kang:
Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design. ASAP 2019: 157-164 - [c50]Wentai Zhang
An Efficient Mapping Approach to Large-Scale DNNs on Multi-FPGA Architectures. DATE 2019: 1241-1244 - [c49]Zhucheng Tang, Guojie Luo, Ming Jiang:
FTConv: FPGA Acceleration for Transposed Convolution Layers in Deep Neural Networks. FPGA 2019: 189 - [c48]Bizhao Shi
Winograd-Based Real-Time Super-Resolution System on FPGA. FPT 2019: 423-426 - [c47]Jiaxi Zhang, Wentai Zhang
Frequency Improvement of Systolic Array-Based CNNs on FPGAs. ISCAS 2019: 1-4 - [c46]Shuang Wen, Guojie Luo:
An Analytical Method of Automatic Alignment for Electron Tomography. LABELS/HAL-MICCAI/CuRIOUS@MICCAI 2019: 106-114 - 2018
- [b1]Ruipeng Gao, Fan Ye, Guojie Luo, Jason Cong:
Smartphone-Based Indoor Map Construction - Principles and Applications. Springer Briefs in Computer Science, Springer 2018, ISBN 978-981-10-8377-8, pp. 1-109 - [c45]Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, Guojie Luo:
FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos. FCCM 2018: 181-188 - [c44]Minghua Shen, Guojie Luo, Nong Xiao:
Exploiting Box Expansion and Grid Partitioning for Parallel FPGA Routing. FCCM 2018: 209 - [c43]Minghua Shen, Wentai Zhang, Nong Xiao, Guojie Luo:
Towards Serial-Equivalent Parallel Routing for FPGAs: (Abstract Only). FPGA 2018: 289 - [c42]Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang:
DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only). FPGA 2018: 290 - [c41]Minghua Shen, Jiaxi Zhang, Nong Xiao, Guojie Luo:
BoxPlacer: Force Directed-Based Timing-Driven Placement for Large-Scale FPGAs: (Abstract Only). FPGA 2018: 290 - [c40]Wentai Zhang, Jiaxi Zhang, Minghua Shen, Nong Xiao, Guojie Luo:
Mapping Large-Scale DNNs on Asymmetric FPGAs: (Abstract Only). FPGA 2018: 291 - [c39]Wentai Zhang
Adaptive-precision framework for SGD using deep Q-learning. ICCAD 2018: 35 - [c38]Xiuhong Li, Yun Liang, Wentai Zhang
cuMBIR: An Efficient Framework for Low-dose X-ray CT Image Reconstruction on GPUs. ICS 2018: 184-194 - [c37]Shuang Jiang, Dong He
Accelerating Mobile Applications at the Network Edge with Software-Programmable FPGAs. INFOCOM 2018: 55-62 - [c36]Peichen Xie, Guangyu Sun, Feng Wang, Guojie Luo:
V-PIM: An Analytical Overhead Model for Processing-in-Memory Architectures. NVMSA 2018: 107-108 - 2017
- [j8]Ruipeng Gao, Mingmin Zhao, Tao Ye, Fan Ye, Yizhou Wang, Guojie Luo:
Smartphone-Based Real Time Vehicle Tracking in Indoor Parking Structures. IEEE Trans. Mob. Comput. 16(7): 2023-2036 (2017) - [c35]Minghua Shen, Guojie Luo:
Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning. FCCM 2017: 27 - [c34]Minghua Shen, Guojie Luo:
Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion. FPGA 2017: 105-114 - [c33]Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, Zhiru Zhang:
A Parallel Bandit-Based Approach for Autotuning FPGA Compilation. FPGA 2017: 157-166 - [c32]Zhuolun He, Guojie Luo:
FPGA Acceleration for Computational Glass-Free Displays. FPGA 2017: 267-274 - [c31]Minghua Shen, Guojie Luo, Nong Xiao:
A coordinated synchronous and asynchronous parallel routing approach for FPGAs. ICCAD 2017: 577-584 - [c30]Minghua Shen, Nong Xiao, Guojie Luo:
Dependency-Aware Parallel Routing for Large-Scale FPGAs. ICCD 2017: 249-256 - [c29]Feng Wang, Jiaxi Zhang, Lange Wu, Wentai Zhang
Search space reduction for the non-exact projective NPNP Boolean matching problem. ISCAS 2017: 1-4 - [c28]Minghua Shen, Guojie Luo:
Tiguan: Energy-aware collision-free control for large-scale connected vehicles. ISLPED 2017: 1-6 - 2016
- [j7]Ruipeng Gao, Yang Tian, Fan Ye, Guojie Luo, Kaigui Bian, Yizhou Wang, Tao Wang, Xiaoming Li:
Sextant: Towards Ubiquitous Indoor Localization Service by Photo-Taking of the Environment. IEEE Trans. Mob. Comput. 15(2): 460-474 (2016) - [j6]Ruipeng Gao, Mingmin Zhao, Tao Ye, Fan Ye, Guojie Luo, Yizhou Wang, Kaigui Bian, Tao Wang, Xiaoming Li:
Multi-Story Indoor Floor Plan Reconstruction via Mobile Crowdsensing. IEEE Trans. Mob. Comput. 15(6): 1427-1442 (2016) - [j5]Chang Xu, Guojie Luo, Peixin Li, Yiyu Shi, Iris Hui-Ru Jiang:
Analytical Clustering Score with Application to Postplacement Register Clustering. ACM Trans. Design Autom. Electr. Syst. 21(3): 41:1-41:18 (2016) - [c27]Ruipeng Gao, Guojie Luo, Fan Ye:
VeMap: Indoor Road Map Construction via Smartphone-Based Vehicle Tracking. GLOBECOM 2016: 1-6 - [c26]Baihong Jin, Guojie Luo, Wentai Zhang
A fast and accurate approach for common path pessimism removal in static timing analysis. ISCAS 2016: 2623-2626 - [c25]Chen Zhang
Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster. ISLPED 2016: 326-331 - [c24]Guojie Luo, Wentai Zhang
Scaling Up Physical Design: Challenges and Opportunities. ISPD 2016: 131-137 - 2015
- [c23]Guojie Luo, Baihong Jin, Wentai Zhang:
A Fast and Simple Block-Based Approach for Common Path Pessimism Removal in Static Timing Analysis. CAD/Graphics 2015: 234-235 - [c22]Wentai Zhang, Li Shen, Thomas Page, Guojie Luo, Peng Li
FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only). FPGA 2015: 261 - [c21]Minghua Shen, Guojie Luo:
Accelerate FPGA Routing with Parallel Recursive Partitioning. ICCAD 2015: 118-125 - [c20]Chang Xu, Peixin Li, Guojie Luo, Yiyu Shi, Iris Hui-Ru Jiang:
Analytical Clustering Score with Application to Post-Placement Multi-Bit Flip-Flop Merging. ISPD 2015: 93-100 - [c19]Mingmin Zhao, Tao Ye, Ruipeng Gao, Fan Ye, Yizhou Wang, Guojie Luo:
VeTrack: Real Time Vehicle Tracking in Uninstrumented Indoor Environments. SenSys 2015: 99-112 - 2014
- [c18]Peng Li, Thomas Page, Guojie Luo, Wentai Zhang, Pei Wang, Peng Zhang, Peter Maass
FPGA Acceleration for Simultaneous Medical Image Reconstruction and Segmentation. FCCM 2014: 172 - [c17]Chang Xu, Wentai Zhang
Analyzing the impact of heterogeneous blocks on FPGA placement quality. FPT 2014: 36-43 - [c16]Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun:
Rapid design space exploration of two-level unified caches. ISCAS 2014: 1937-1940 - [c15]Mingmin Zhao, Ruipeng Gao, Jiaxu Zhu, Tao Ye, Fan Ye, Yizhou Wang, Kaigui Bian, Guojie Luo, Ming Zhang:
VeLoc: finding your car in the parking lot. SenSys 2014: 346-347 - 2013
- [j4]Guojie Luo, Yiyu Shi, Jason Cong:
An Analytical Placement Framework for 3-D ICs and Its Extension on Thermal Awareness. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 510-523 (2013) - [c14]Jason Cong, Guojie Luo, Kalliopi Tsota, Bingjun Xiao:
Optimizing routability in large-scale mixed-size placement. ASP-DAC 2013: 441-446 - [c13]Chang-Cheng Tsai, Yiyu Shi, Guojie Luo, Iris Hui-Ru Jiang:
FF-bond: multi-bit flip-flop bonding at placement. ISPD 2013: 147-153 - 2012
- [c12]Peng Li
Memory partitioning and scheduling co-optimization in behavioral synthesis. ICCAD 2012: 488-495 - [c11]Jason Cong, Bin Liu, Guojie Luo, Raghu Prabhakar:
Towards layout-friendly high-level synthesis. ISPD 2012: 165-172 - 2011
- [c10]Jason Cong, Guojie Luo, Yiyu Shi:
Thermal-aware cell and through-silicon-via co-placement for 3D ICs. DAC 2011: 670-675 - [c9]Jeonghee Shin, John A. Darringer, Guojie Luo, Alan J. Weger, Charles L. Johnson:
Early chip planning cockpit. DATE 2011: 863-866 - [c8]Jason Cong, John Lee, Guojie Luo:
A unified optimization framework for simultaneous gate sizing and placement under density constraints. ISCAS 2011: 1207-1210 - [c7]Guojie Luo:
Physical hierarchy exploration of 3D processors. ISOCC 2011: 139-141 - [c6]Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy:
Floorplanning challenges in early chip planning. SoCC 2011: 388-393 - 2010
- [j3]Jason Cong, Guojie Luo:
Advances and Challenges in 3D Physical Design. Inf. Media Technol. 5(2): 321-337 (2010) - [j2]Jason Cong, Guojie Luo:
Advances and Challenges in 3D Physical Design. IPSJ Trans. Syst. LSI Des. Methodol. 3: 2-18 (2010) - [c5]Thorlindur Thorolfsson, Guojie Luo, Jason Cong, Paul D. Franzon
Logic-on-logic 3D integration and placement. 3DIC 2010: 1-4 - [c4]Jason Cong, Guojie Luo:
An analytical placer for mixed-size 3D placement. ISPD 2010: 61-66
2000 – 2009
- 2009
- [c3]Jason Cong, Guojie Luo:
A multilevel analytical placement for 3D ICs. ASP-DAC 2009: 361-366 - 2008
- [j1]Jason Cong, Guojie Luo, Eric Radke:
Highly Efficient Gradient Computation for Density-Constrained Analytical Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(12): 2133-2144 (2008) - [c2]Jason Cong, Guojie Luo:
Highly efficient gradient computation for density-constrained analytical placement methods. ISPD 2008: 39-46 - 2007
- [c1]Jason Cong, Guojie Luo, Jie Wei, Yan Zhang:
Thermal-Aware 3D IC Placement Via Transformation. ASP-DAC 2007: 780-785
Coauthor Index
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