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Maxime Pelcat
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2020 – today
- 2024
- [c73]Joseph W. Faye, Naouel Haggui
, Florent Kermarrec, Kevin J. M. Martin
Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications. DASIP 2024: 68-79 - [c72]Olivier Weppe, Jérôme Chossat, Thibaut Marty, Jean-Christophe Prévotet, Maxime Pelcat:
Streamlined Models of CMOS Image Sensors Carbon Impacts. DSD 2024: 250-257 - [c71]Eloïse Delolme, Viktor Fischer, Florent Bernard, Nathalie Bochard, Maxime Pelcat:
Beyond Total Locking: Demonstrating and Measuring Mutual Influence on a RO-Based True Random Number Generator on an FPGA. SOCC 2024: 1-6 - 2023
- [j27]Walther Carballo-Hernández
Flydeling: Streamlined Performance Models for Hardware Acceleration of CNNs through System Identification. ACM Trans. Model. Perform. Evaluation Comput. Syst. 8(3): 1-33 (2023) - [j26]Walther Carballo-Hernández
Automatic CNN Model Partitioning for GPU/FPGA-based Embedded Heterogeneous Accelerators using Geometric Programming. J. Signal Process. Syst. 95(10): 1203-1218 (2023) - [c70]May Myat Thu
You Only Get One-Shot: Eavesdropping Input Images to Neural Network by Spying SoC-FPGA Internal Bus. ARES 2023: 31:1-31:7 - [c69]Jeremy Guillaume
Attacking at Non-harmonic Frequencies in Screaming-Channel Attacks. CARDIS 2023: 87-106 - [i15]Jeremy Guillaume, Maxime Pelcat, Amor Nafkha, Rubén Salvador:
Attacking at non-harmonic frequencies in screaming-channel attacks. CoRR abs/2311.15832 (2023) - 2022
- [j25]Nicolas Sourbier
SECURE-GEGELATI Always-On Intrusion Detection through GEGELATI Lightweight Tangled Program Graphs. J. Signal Process. Syst. 94(7): 753-770 (2022) - [c68]Nicolas Sourbier, Justine Bonnot, Frédéric Majorczyk, Olivier Gesny
Imbalanced classification with tpg genetic programming: impact of problem imbalance and selection mechanisms. GECCO Companion 2022: 608-611 - [c67]Pedro Ciambra, Mickaël Dardaillon, Maxime Pelcat, Hervé Yviquel:
Co-optimizing Dataflow Graphs and Actors with MLIR. SiPS 2022: 1-6 - [c66]Karol Desnos, Thomas Bourgoin, Mickaël Dardaillon, Nicolas Sourbier, Olivier Gesny
Ultra-Fast Machine Learning Inference through C Code Generation for Tangled Program Graphs. SiPS 2022: 1-6 - [c65]Jeremy Guillaume
Virtual Triggering: a Technique to Segment Cryptographic Processes in Side-Channel Traces. SiPS 2022: 1-6 - [i14]Jeremy Guillaume, Maxime Pelcat, Amor Nafkha, Rubén Salvador:
Virtual Triggering: a Technique to Segment Cryptographic Processes in Side Channel Traces. CoRR abs/2210.12059 (2022) - 2021
- [j24]Saman Payvar
A model of architecture for estimating GPU processing performance and power. Des. Autom. Embed. Syst. 25(1): 43-63 (2021) - [j23]Claudio Rubattu
PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs. ACM Trans. Model. Perform. Evaluation Comput. Syst. 6(4): 15:1-15:30 (2021) - [c64]Karol Desnos, Nicolas Sourbier, Pierre-Yves Raumer, Olivier Gesny
Gegelati: Lightweight Artificial Intelligence through Generic and Evolvable Tangled Program Graphs. DASIP 2021: 35-43 - [c63]Claudio Rubattu, Francesca Palumbo
PathTracing: Raising the Level of Understanding of Processing Latency in Heterogeneous MPSoCs. DroneSE/RAPIDO@HiPEAC 2021: 46-50 - [i13]Walther Carballo-Hernández, Maxime Pelcat, François Berry:
Why is FPGA-GPU Heterogeneity the Best Option for Embedded Deep Neural Networks? CoRR abs/2102.01343 (2021) - [i12]Tiziana Fanni, Daniel Madroñal, Claudio Rubattu, Carlo Sau, Francesca Palumbo, Eduardo Juárez, Maxime Pelcat, César Sanz, Luigi Raffo:
Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI. CoRR abs/2103.01195 (2021) - 2020
- [j22]Jonathan Bonnard, Kamel Abdelouahab
On building a CNN-based multi-view smart camera for real-time object detection. Microprocess. Microsystems 77: 103177 (2020) - [j21]Naty Sidaty
Software HEVC video decoder: towards an energy saving for mobile applications. Multim. Tools Appl. 79(37-38): 26861-26884 (2020) - [j20]Federico Civerchia
Is OpenCL Driven Reconfigurable Hardware Suitable for Virtualising 5G Infrastructure? IEEE Trans. Netw. Serv. Manag. 17(2): 849-863 (2020) - [c62]Shanxin Yuan, Radu Timofte
NTIRE 2020 Challenge on Image Demoireing: Methods and Results. CVPR Workshops 2020: 1882-1893 - [c61]Florian Lemarchand, Eduardo Fernandes Montesuma
Opendenoising: An Extensible Benchmark for Building Comparative Studies of Image Denoisers. ICASSP 2020: 2648-2652 - [c60]Florian Lemarchand, Cyril Marlin, Florent Montreuil, Erwan Nogues, Maxime Pelcat:
Electro-Magnetic Side-Channel Attack Through Learned Denoising and Classification. ICASSP 2020: 2882-2886 - [c59]Florian Lemarchand, Thomas Findeli, Erwan Nogues, Maxime Pelcat:
NoiseBreaker: Gradual Image Denoising Guided by Noise Analysis. MMSP 2020: 1-6 - [i11]Florian Lemarchand, Erwan Nogues, Maxime Pelcat:
NoiseBreaker: Gradual Image Denoising Guided by Noise Analysis. CoRR abs/2002.07487 (2020) - [i10]Shanxin Yuan, Radu Timofte, Ales Leonardis, Gregory G. Slabaugh, Xiaotong Luo, Jiangtao Zhang, Yanyun Qu, Ming Hong, Yuan Xie, Cuihua Li, Dejia Xu, Yihao Chu, Qingyan Sun, Shuai Liu, Ziyao Zong, Nan Nan, Chenghua Li, Sangmin Kim, Hyungjoon Nam, Jisu Kim, Jechang Jeong, Manri Cheon, Sung-Jun Yoon, Byungyeon Kang, Junwoo Lee, Bolun Zheng, Xiaohong Liu, Linhui Dai, Jun Chen, Xi Cheng, Zhenyong Fu, Jian Yang, Chul Lee, Vien Gia An, Hyunkook Park, Sabari Nathan, M. Parisa Beham, S. Mohamed Mansoor Roomi, Florian Lemarchand, Maxime Pelcat, Erwan Nogues, Densen Puthussery, Hrishikesh P. S, C. V. Jiji, Ashish Sinha, Xuan Zhao:
NTIRE 2020 Challenge on Image Demoireing: Methods and Results. CoRR abs/2005.03155 (2020) - [i9]Karol Desnos, Nicolas Sourbier, Pierre-Yves Raumer, Olivier Gesny
Gegelati: Lightweight Artificial Intelligence through Generic and Evolvable Tangled Program Graphs. CoRR abs/2012.08296 (2020)
2010 – 2019
- 2019
- [j19]Claudio Rubattu
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators. IEEE Embed. Syst. Lett. 11(3): 69-72 (2019) - [j18]Alexandre Mercat, Florian Arrestier, Maxime Pelcat, Wassim Hamidouche, Daniel Ménard:
On predicting the HEVC intra quad-tree partitioning with tunable energy and rate-distortion. J. Real Time Image Process. 16(1): 161-174 (2019) - [j17]Leonardo Suriano
DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping. Microprocess. Microsystems 71 (2019) - [j16]Erwan Nogues
Algorithmic-Level Approximate Computing Applied to Energy Efficient HEVC Decoding. IEEE Trans. Emerg. Top. Comput. 7(1): 5-17 (2019) - [j15]Alexandre Mercat
Probabilistic Approach Versus Machine Learning for One-Shot Quad-Tree Prediction in an Intra HEVC Encoder. J. Signal Process. Syst. 91(9): 1021-1037 (2019) - [c58]Francesca Palumbo
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA, IBM Research, TASE, INSA-Rennes, UPM, USI, Abinsula, AmbieSense, TNO, S&T, CRF. CF 2019: 320-325 - [c57]Saman Payvar, Jani Boutellier, Antoine Morvan, Claudio Rubattu, Maxime Pelcat:
Extending Architecture Modeling for Signal Processing towards GPUs. EUSIPCO 2019: 1-5 - [c56]Federico Civerchia, Piero Castoldi, Luca Valcarenghi
Exploiting reconfigurable computing in 5G: a case study of latency critical function: Invited Paper. HPSR 2019: 1-6 - [c55]Erwan Nogues, Alexandre Mercat
Convex Energy Optimization of Streaming Applications for MPSoCs. ICASSP 2019: 1557-1561 - [c54]Walther Carballo-Hernández, François Berry, Maxime Pelcat, Miguel Arias-Estrada
Towards Embedded Heterogeneous FPGA-GPU Smart Camera Architectures for CNN Inference. ICDSC 2019: 34:1-34:2 - [c53]Alexandre Honorat, Karol Desnos, Maxime Pelcat, Jean-François Nezan:
Modeling Nested for Loops with Explicit Parallelism in Synchronous DataFlow Graphs. SAMOS 2019: 269-280 - [c52]Francesca Palumbo
Hardware/Software Self-adaptation in CPS: The CERBERO Project Approach. SAMOS 2019: 416-428 - [e1]Dionisios N. Pnevmatikatos, Maxime Pelcat, Matthias Jung:
Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings. Lecture Notes in Computer Science 11733, Springer 2019, ISBN 978-3-030-27561-7 [contents] - [i8]Florian Lemarchand, Cyril Marlin, Florent Montreuil, Erwan Nogues, Maxime Pelcat:
Electro-Magnetic Side-Channel Attack Through Learned Denoising and Classification. CoRR abs/1910.07201 (2019) - [i7]Florian Lemarchand, Eduardo Fernandes Montesuma, Maxime Pelcat, Erwan Nogues:
OpenDenoising: an Extensible Benchmark for Building Comparative Studies of Image Denoisers. CoRR abs/1910.08328 (2019) - 2018
- [j14]Maxime Pelcat, Alexandre Mercat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Wassim Hamidouche, Daniel Ménard, Shuvra S. Bhattacharyya:
Reproducible Evaluation of System Efficiency With a Model of Architecture: From Theory to Practice. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2050-2063 (2018) - [j13]Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid:
Comparing Three Clustering-based Scheduling Methods for Energy-Aware Rapid Design of MP2SoCs. J. Signal Process. Syst. 90(4): 537-570 (2018) - [c51]Justine Bonnot, Karol Desnos, Maxime Pelcat, Daniel Ménard:
A Fast and Fuzzy Functional Simulator of Inexact Arithmetic Operators for Approximate Computing Systems. ACM Great Lakes Symposium on VLSI 2018: 195-200 - [c50]Alexandre Mercat, Florian Arrestier, Maxime Pelcat, Wassim Hamidouche, Daniel Ménard:
Machine Learning Based Choice of Characteristics for the One-Shot Determination of the HEVC Intra Coding Tree. PCS 2018: 263-267 - [c49]Florian Arrestier, Karol Desnos, Maxime Pelcat, Julien Heulot, Eduardo Juárez
Delays and states in dataflow models of computation. SAMOS 2018: 47-54 - [c48]Kamel Abdelouahab
The challenge of multi-operand adders in CNNs on FPGAs: how not to solve it! SAMOS 2018: 157-160 - [i6]Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry:
Accelerating CNN inference on FPGAs: A Survey. CoRR abs/1806.01683 (2018) - [i5]Kamel Abdelouahab, François Berry, Maxime Pelcat:
The Challenge of Multi-Operand Adders in CNNs on FPGAs: How not to solve it! CoRR abs/1807.00217 (2018) - 2017
- [j12]Carlo Sau
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing. IEEE Embed. Syst. Lett. 9(3): 65-68 (2017) - [j11]Kamel Abdelouahab
Tactics to Directly Map CNN Graphs on Embedded FPGAs. IEEE Embed. Syst. Lett. 9(4): 113-116 (2017) - [j10]Erwan Nogues, Julien Heulot, Glenn Herrou, Ladislas Robin, Maxime Pelcat, Daniel Ménard, Erwan Raffin
Efficient DVFS for low power HEVC software decoder. J. Real Time Image Process. 13(1): 39-54 (2017) - [j9]Raquel Lazcano, Daniel Madroñal
Porting a PCA-based hyperspectral image dimensionality reduction algorithm for brain cancer detection on a manycore architecture. J. Syst. Archit. 77: 101-111 (2017) - [j8]Alexandre Mercat, Justine Bonnot, Maxime Pelcat, Karol Desnos, Wassim Hamidouche, Daniel Ménard:
Smart search space reduction for approximate computing: A low energy HEVC encoder case study. J. Syst. Archit. 80: 56-67 (2017) - [j7]Simon Holmbacka, Erwan Nogues, Maxime Pelcat, Sébastien Lafond
Energy-Awareness and Performance Management with Parallel Dataflow Applications. J. Signal Process. Syst. 87(1): 33-48 (2017) - [c47]Erwan Nogues, Daniel Ménard, Alexandre Mercat, Maxime Pelcat:
On Learning the Energy Model of an MPSoC for Convex Optimization. Conf. Computing Frontiers 2017: 385-390 - [c46]Alexandre Mercat, Justine Bonnot, Maxime Pelcat, Wassim Hamidouche, Daniel Ménard:
Exploiting computation skip to reduce energy consumption by approximate computing, an HEVC encoder case study. DATE 2017: 494-499 - [c45]Michael Masin, Francesca Palumbo
Cross-layer design of reconfigurable cyber-physical systems. DATE 2017: 740-745 - [c44]Naty Ould Sidaty, Julien Heulot, Wassim Hamidouche, Erwan Nogues, Maxime Pelcat, Daniel Ménard:
Reducing computational complexity in HEVC decoder for mobile energy saving. EUSIPCO 2017: 1026-1030 - [c43]Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Ménard:
Energy reduction opportunities in an HEVC real-time encoder. ICASSP 2017: 1158-1162 - [c42]Alexandre Mercat, Florian Arrestier, Wassim Hamidouche, Maxime Pelcat, Daniel Ménard:
Constrain the Docile CTUs: An In-Frame complexity allocator for HEVC Intra encoders. ICASSP 2017: 1163-1167 - [c41]El Mehdi Abdali, Abderrahmane Walid Hanniche
Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA. ICDSC 2017: 180-185 - [c40]Kamel Abdelouahab
Why TanH is a Hardware Friendly Activation Function for CNNs. ICDSC 2017: 199-201 - [c39]Claudio Rubattu, Francesca Palumbo
Adaptive software-augmented hardware reconfiguration with dataflow design automation. ReConFig 2017: 1-4 - [c38]El Mehdi Abdali, Maxime Pelcat, François Berry, Jean-Philippe Diguet, Francesca Palumbo
Exploring the performance of partially reconfigurable point-to-point interconnects. ReCoSoC 2017: 1-6 - [c37]Leonardo Suriano
Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC. ReCoSoC 2017: 1-7 - [c36]Alexandre Mercat, Florian Arrestier, Maxime Pelcat, Wassim Hamidouche, Daniel Ménard:
Prediction of quad-tree partitioning for budgeted energy HEVC encoding. SiPS 2017: 1-6 - [i4]Kamel Abdelouahab, Cédric Bourrasset, Maxime Pelcat, François Berry, Jean-Charles Quinton, Jocelyn Sérot:
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. CoRR abs/1703.09779 (2017) - [i3]Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry, Cédric Bourrasset, Jean-Charles Quinton:
Hardware Automated Dataflow Deployment of CNNs. CoRR abs/1705.04543 (2017) - [i2]Kamel Abdelouahab, Maxime Pelcat, Cédric Bourrasset, François Berry, Jocelyn Sérot:
Tactics to Directly Map CNN graphs on Embedded FPGAs. CoRR abs/1712.04322 (2017) - 2016
- [j6]Erwan Raffin
Low power HEVC software decoder for mobile devices. J. Real Time Image Process. 12(2): 495-507 (2016) - [j5]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
On Memory Reuse Between Inputs and Outputs of Dataflow Actors. ACM Trans. Embed. Comput. Syst. 15(2): 30:1-30:25 (2016) - [j4]Zheng Zhou, William Plishker, Shuvra S. Bhattacharyya
Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing. J. Signal Process. Syst. 83(3): 309-328 (2016) - [j3]John McAllister, Máire O'Neill, Maxime Pelcat:
Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies. J. Signal Process. Syst. 84(3): 293-294 (2016) - [c35]Maxime Pelcat, Erwan Nogues, Xavier Ducloux:
Energy reduction in video systems: the GreenVideo project. Conf. Computing Frontiers 2016: 398 - [c34]Erwan Raffin
Scalable HEVC decoder for mobile devices: Trade-off between energy consumption and quality. DASIP 2016: 18-25 - [c33]Alexandre Mercat, Wassim Hamidouche, Maxime Pelcat, Daniel Ménard:
Estimating encoding complexity of a real-time embedded software HEVC codec. DASIP 2016: 26-33 - [c32]Carlo Sau
Demo: Reconfigurable Platform Composer Tool. DASIP 2016: 245-246 - [c31]Miguel Chavarrías
Design of multicore HEVC decoders using actor-based dataflow models and OpenMP. ICCE 2016: 287-288 - [c30]Kamel Abdelouahab
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. ICDSC 2016: 69-75 - [c29]Sébastien Caux, Edouard Hendrickx, François Berry, Maxime Pelcat, Jocelyn Sérot:
Demo GPStudio: a toolchain for FPGA-based Smart Cameras: Demo Paper. ICDSC 2016: 214-215 - [c28]Kamel Abdelouahab
Propagation of Quantification Error Over Convolutional Neural Network layers: PhD Forum. ICDSC 2016: 226-227 - [c27]El Mehdi Abdali, Maxime Pelcat, François Berry, Jean-Philippe Diguet, Dominique Heller:
Task Clustering Approach to Optimize the Scheduling on a Partially Dynamically Reconfigurable FPGAs for image processing algorithms. ICDSC 2016: 230-231 - [c26]Erwan Nogues, Maxime Pelcat, Daniel Ménard, Alexandre Mercat:
Energy Efficient Scheduling of Real Time Signal Processing Applications through Combined DVFS and DPM. PDP 2016: 622-626 - [c25]Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid:
On Exploiting Energy-Aware Scheduling Algorithms for MDE-Based Design Space Exploration of MP2SoC. PDP 2016: 643-650 - [c24]Maxime Pelcat, Cédric Bourrasset, Luca Maggiani, François Berry:
Design productivity of a high level synthesis compiler versus HDL. SAMOS 2016: 140-147 - [c23]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Distributed Memory Allocation Technique for Synchronous Dataflow Graphs. SiPS 2016: 45-50 - [c22]Maxime Pelcat, Karol Desnos, Luca Maggiani, Yanzhou Liu, Julien Heulot, Jean-François Nezan, Shuvra S. Bhattacharyya:
Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems. SiPS 2016: 121-126 - [c21]Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid:
Off-Line DVFS Integration in MDE-Based Design Space Exploration Framework for MP2SoC Systems. WETICE 2016: 160-165 - 2015
- [j2]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Memory Analysis and Optimized Allocation of Dataflow Applications on Shared-Memory MPSoCs - In-Depth Study of a Computer Vision Application. J. Signal Process. Syst. 80(1): 19-37 (2015) - [c20]Erwan Nogues, Erwan Raffin
A modified HEVC decoder for low power decoding. Conf. Computing Frontiers 2015: 60:1-60:6 - [c19]Erwan Raffin
Energy efficiency of a parallel HEVC software decoder for embedded devices. Conf. Computing Frontiers 2015: 62:1-62:6 - [c18]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Buffer merging technique for minimizing memory footprints of Synchronous Dataflow specifications. ICASSP 2015: 1111-1115 - [c17]Erwan Nogues, Romain Berrada, Maxime Pelcat, Daniel Ménard, Erwan Raffin
A DVFS based HEVC decoder for energy-efficient software implementation on embedded processors. ICME 2015: 1-6 - [c16]Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid:
Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems. SNPD (revised selected papers) 2015: 195-211 - 2014
- [c15]Manel Ammar, Mouna Baklouti, Maxime Pelcat, Karol Desnos, Mohamed Abid:
MARTE to ΠSDF transformation for data-intensive applications analysis. DASIP 2014: 1-8 - [c14]Julien Heulot, Judicael Menant, Maxime Pelcat, Jean-François Nezan, Luce Morin, Muriel Pressigout, Slaheddine Aridhi:
Demonstrating a dataflow-based RTOS for heterogeneous MPSoC by means of a stereo matching application. DASIP 2014: 1-2 - [c13]Simon Holmbacka, Erwan Nogues, Maxime Pelcat, Sébastien Lafond
Energy efficiency and performance management of parallel dataflow applications. DASIP 2014: 1-8 - [c12]Julien Heulot, Maxime Pelcat, Jean-François Nezan, Yaset Oliva, Slaheddine Aridhi, Shuvra S. Bhattacharyya
Just-in-time scheduling techniques for multicore signal processing systems. GlobalSIP 2014: 25-29 - [c11]Karol Desnos, Safwan El Assad, Aurore Arlicot, Maxime Pelcat, Daniel Ménard:
Efficient multicore implementation of an advanced generator of discrete chaotic sequences. ICITST 2014: 31-36 - [c10]Erwan Nogues, Simon Holmbacka, Maxime Pelcat, Daniel Ménard, Johan Lilius
Power-aware HEVC decoding with tunable image quality. SiPS 2014: 38-43 - 2013
- [b2]Maxime Pelcat, Slaheddine Aridhi, Jonathan Piat, Jean-François Nezan:
Physical Layer Multi-Core Prototyping - A Dataflow-Based Approach for LTE eNodeB. Lecture Notes in Electrical Engineering 171, Springer 2013, ISBN 978-1-4471-4209-6, pp. 1-198 - [c9]Julien Heulot, Jani Boutellier
Applying the adaptive Hybrid Flow-Shop scheduling method to schedule a 3GPP LTE physical layer algorithm onto many-core digital signal processors. AHS 2013: 123-129 - [c8]Jinglin Zhang, Jean-François Nezan, Maxime Pelcat, Jean-Gabriel Cousin:
Real-time GPU-based local stereo matching method. DASIP 2013: 209-214 - [c7]Zheng Zhou, Karol Desnos, Maxime Pelcat, Jean-François Nezan, William Plishker, Shuvra S. Bhattacharyya:
Scheduling of parallelized synchronous dataflow actors. ISSoC 2013: 1-10 - [c6]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Shuvra S. Bhattacharyya
PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration. ICSAMOS 2013: 41-48 - 2012
- [c5]Julien Heulot, Karol Desnos, Jean-François Nezan, Maxime Pelcat, Mickaël Raulet, Hervé Yviquel, P.-L. Lagalaye, Jean-Christophe Le Lann:
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC. DASIP 2012: 1-2 - [c4]Karol Desnos, Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Memory bounds for the distributed execution of a hierarchical Synchronous Data-Flow graph. ICSAMOS 2012: 160-167 - 2011
- [c3]Yaset Oliva, Maxime Pelcat, Jean-François Nezan, Jean-Christophe Prévotet
Building a RTOS for MPSoC dataflow programming. SoC 2011: 143-146 - 2010
- [b1]Maxime Pelcat:
Prototypage Rapide et Génération de Code pour DSP Multi-Coeurs Appliqués à la Couche Physique des Stations de Base 3GPP LTE. (Rapid Prototyping and Dataflow-Based Code Generation for the 3GPP LTE eNodeB Physical Layer mapped onto Multi-Core DSPs). INSA de Rennes, France, 2010 - [c2]Maxime Pelcat, Jean-François Nezan, Slaheddine Aridhi:
Adaptive multicore scheduling for the LTE uplink. AHS 2010: 36-43
2000 – 2009
- 2009
- [j1]Maxime Pelcat, Jonathan Piat, Matthieu Wipliez, Slaheddine Aridhi, Jean-François Nezan:
An Open Framework for Rapid Prototyping of Signal Processing Applications. EURASIP J. Embed. Syst. 2009 (2009) - [c1]Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi, Jean-François Nezan:
Scalable compile-time scheduler for multi-core architectures. DATE 2009: 1552-1555 - 2008
- [i1]Maxime Pelcat, Slaheddine Aridhi, Jean-François Nezan:
Optimization of automatically generated multi-core code for the LTE RACH-PD algorithm. CoRR abs/0811.0582 (2008)
Coauthor Index
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