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Jong-Ho Lee 0002
Person information
- affiliation: Seoul National University, South Korea Ministry of Science and ICT, South Korea
- affiliation: Seoul National University, Department of Electrical and Computer Engineering / Inter-University Semiconductor Research Center, South Korea
- affiliation (1998 - 1999): Massachusetts Institute of Technology, Cambridge, MA, USA
- affiliation (PhD 1993): Seoul National University, South Korea
Other persons with the same name
- Jongho Lee (aka: Jong-Ho Lee, Jong Ho Lee) — disambiguation page
- Jong-Ho Lee 0001
— Soongsil University, School of Electronic Engineering, Seoul, South Korea (and 5 more)
- Jongho Lee 0003
- Jongho Lee 0004
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2020 – today
- 2024
- [j22]Kyu-Ho Lee, Dongseok Kwon, In-Seok Lee, Joon Hwang, Jiseong Im, Jong-Ho Bae, Woo Young Choi, Sung Yun Woo, Jong-Ho Lee:
Si-Based Dual-Gate Field-Effect Transistor Array for Low-Power On-Chip Trainable Hardware Neural Networks. Adv. Intell. Syst. 6(1) (2024) - [j21]JongHyun Ko, Dongseok Kwon, Joon Hwang, Kyu-Ho Lee, Seongbin Oh, Jeonghyun Kim, Jiseong Im, Ryun-Han Koo, Jae-Joon Kim, Jong-Ho Lee
SNNSim: Investigation and Optimization of Large-Scale Analog Spiking Neural Networks Based on Flash Memory Devices. Adv. Intell. Syst. 6(4) (2024) - [j20]Jangsaeng Kim
Toward Optimized In-Memory Reinforcement Learning: Leveraging 1/f Noise of Synaptic Ferroelectric Field-Effect-Transistors for Efficient Exploration. Adv. Intell. Syst. 6(6) (2024) - 2023
- [j19]Wonjun Shin, Kyung Kyu Min, Jong-Ho Bae, Jaehyeon Kim, Ryun-Han Koo, Dongseok Kwon, Jae-Joon Kim, Daewoong Kwon, Jong-Ho Lee:
1/f Noise in Synaptic Ferroelectric Tunnel Junction: Impact on Convolutional Neural Network. Adv. Intell. Syst. 5(6) (2023) - [j18]Dongseok Kwon, Eun Chan Park, Wonjun Shin, Ryun-Han Koo, Joon Hwang, Jong-Ho Bae, Daewoong Kwon, Jong-Ho Lee:
Analog Synaptic Devices Based on IGZO Thin-Film Transistors with a Metal-Ferroelectric-Metal-Insulator-Semiconductor Structure for High-Performance Neuromorphic Systems. Adv. Intell. Syst. 5(12) (2023) - 2022
- [j17]Seongbin Oh
Neuron Circuits for Low-Power Spiking Neural Networks Using Time-To-First-Spike Encoding. IEEE Access 10: 24444-24455 (2022) - [j16]Jiseong Im
On-Chip Trainable Spiking Neural Networks Using Time-To-First-Spike Encoding. IEEE Access 10: 31263-31272 (2022) - [j15]Sung-Tae Lee, Hyeongsu Kim, Honam Yoo, Dongseok Kwon, Jong-Ho Lee:
Novel, parallel and differential synaptic architecture based on NAND flash memory for high-density and highly-reliable binary neural networks. Neurocomputing 498: 1-13 (2022) - [c11]Kangwook Choi, Gyuweon Jung, Seongbin Hong, Yujeong Jeong, Wonjun Shin, Jinwoo Park, Chang-Yong Lee, Donghee Kim, Jong-Ho Lee:
Response Analysis of Resistor-type Gas Sensor with Bias Voltage Condition. ISOEN 2022: 1-4 - [c10]Gyuweon Jung, Jaehyeon Kim, Wonjun Shin, Seongbin Hong, Yujeong Jeong, Jinwoo Park, Donghee Kim, Kangwook Choi, Jong-Ho Lee:
Optimal Bias Conditions for FET-type Gas Sensors to Minimize Current Fluctuations. ISOEN 2022: 1-4 - [c9]Hunjun Lee, Minseop Kim, Dongmoon Min, Joonsung Kim, Jongwon Back, Honam Yoo, Jong-Ho Lee, Jangwoo Kim:
3D-FPIM: An Extreme Energy-Efficient DNN Acceleration System Using 3D NAND Flash-Based In-Situ PIM Unit. MICRO 2022: 1359-1376 - [c8]Honam Yoo, Jong-Won Back, Nam-Hun Kim, Dongseok Kwon, Byung-Gook Park, Jong-Ho Lee:
First Demonstration of 1-bit Erase in Vertical NAND Flash Memory. VLSI Technology and Circuits 2022: 304-305 - 2021
- [j14]Won-Mook Kang
Hardware-Based Spiking Neural Network Using a TFT-Type AND Flash Memory Array Architecture Based on Direct Feedback Alignment. IEEE Access 9: 73121-73132 (2021) - [j13]Seongbin Oh, Soochang Lee, Sung Yun Woo, Dongseok Kwon, Jiseong Im, Joon Hwang, Jong-Ho Bae, Byung-Gook Park, Jong-Ho Lee:
Spiking Neural Networks With Time-to-First-Spike Coding Using TFT-Type Synaptic Device Model. IEEE Access 9: 78098-78107 (2021) - [j12]Seunghwan Song
Integrate-and-Fire Neuron Circuit With Synaptic Off-Current Blocking Operation. IEEE Access 9: 127841-127851 (2021) - [j11]Hyungyo Kim
Direct Gradient Calculation: Simple and Variation-Tolerant On-Chip Training Method for Neural Networks. Adv. Intell. Syst. 3(8): 2100064 (2021) - [j10]Hyungyo Kim
Direct Gradient Calculation: Simple and Variation-Tolerant On-Chip Training Method for Neural Networks. Adv. Intell. Syst. 3(8): 2170059 (2021) - [j9]Jangsaeng Kim
Hardware-based spiking neural network architecture using simplified backpropagation algorithm and homeostasis functionality. Neurocomputing 428: 153-165 (2021) - [j8]Jangsaeng Kim, Dongseok Kwon, Sung Yun Woo, Won-Mook Kang, Soochang Lee, Seongbin Oh, Chul-Heung Kim, Jong-Ho Bae, Byung-Gook Park, Jong-Ho Lee:
On-chip trainable hardware-based deep Q-networks approximating a backpropagation algorithm. Neural Comput. Appl. 33(15): 9391-9402 (2021) - [i4]Sung Yun Woo, Dongseok Kwon, Byung-Gook Park, Jong-Ho Lee, Jong-Ho Bae:
Pulse-Width Modulation Neuron Implemented by Single Positive-Feedback Device. CoRR abs/2108.09954 (2021) - 2020
- [j7]Sung-Tae Lee, Dongseok Kwon, Hyeongsu Kim, Honam Yoo, Jong-Ho Lee
NAND Flash Based Novel Synaptic Architecture for Highly Robust and High-Density Quantized Neural Networks With Binary Neuron Activation of (1, 0). IEEE Access 8: 114330-114339 (2020) - [j6]Sung-Tae Lee
Low-Power Binary Neuron Circuit With Adjustable Threshold for Binary Neural Networks Using NAND Flash Memory. IEEE Access 8: 153334-153340 (2020) - [j5]Sung Yun Woo, Dongseok Kwon, Nagyong Choi, Won-Mook Kang, Young-Tak Seo, Min Kyu Park, Jong-Ho Bae, Byung-Gook Park, Jong-Ho Lee:
Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems. IEEE Access 8: 202639-202647 (2020) - [j4]Dong-Hyun Ryu
Double-Gated Asymmetric Floating-Gate-Based Synaptic Device for Effective Performance Enhancement Through Online Learning. IEEE Access 8: 217735-217743 (2020) - [j3]Hyeongsu Kim, Jong-Ho Bae, Suhwan Lim, Sungtae Lee, Young-Tak Seo, Dongseok Kwon, Byung-Gook Park, Jong-Ho Lee:
Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy. Neurocomputing 378: 189-196 (2020) - [i3]Seongbin Oh, Dongseok Kwon, Gyuho Yeom, Won-Mook Kang, Soochang Lee, Sung Yun Woo, Jangsaeng Kim, Min Kyu Park, Jong-Ho Lee:
Hardware Implementation of Spiking Neural Networks Using Time-To-First-Spike Encoding. CoRR abs/2006.05033 (2020)
2010 – 2019
- 2019
- [j2]Suhwan Lim, Jong-Ho Bae, Jai-Ho Eum, Sungtae Lee, Chul-Heung Kim
Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices. Neural Comput. Appl. 31(11): 8101-8116 (2019) - [c7]Jong-Ho Lee, Yoohyun Noh, Hyeongsu Kim, Jangsaeng Kim, Jong-Ho Bae, Sung Yun Woo, Sungtae Lee, Suhwan Lim, Won-Mook Kang, Young-Tak Seo
Review of candidate devices for neuromorphic applications. ESSDERC 2019: 22-27 - [c6]Gyuweon Jung, Yoonki Hong, Seongbin Hong, Yujeong Jeong, Wonjun Shin
Detection of Low Concentration NO2 gas Using Si FET-type Gas Sensor with Localized Micro-heater for Low Power Consumption. IEEE SENSORS 2019: 1-4 - [c5]Won-Mook Kang, Chul-Heung Kim, Soochang Lee, Sung Yun Woo, Jong-Ho Bae, Byung-Gook Park, Jong-Ho Lee:
A Spiking Neural Network with a Global Self-Controller for Unsupervised Learning Based on Spike-Timing-Dependent Plasticity Using Flash Memory Synaptic Devices. IJCNN 2019: 1-7 - [c4]Suhwan Lim, Dongseok Kwon, Sungtae Lee, Hyeongsu Kim, Jong-Ho Bae, Jong-Ho Lee:
Investigation of Neural Networks Using Synapse Arrays Based on Gated Schottky Diodes. IJCNN 2019: 1-8 - [c3]Gyuweon Jung, Hyeongsu Kim, Yujeong Jeong, Yoonki Hong, Meile Wu, Seongbin Hong, Wonjun Shin
Accurate identification of gas type and concentration using DNN reflecting the sensing properties of MOSFET-type gas sensor. ISOEN 2019: 1-4 - 2018
- [c2]Suhwan Lim, Jong-Ho Bae, Jai-Ho Eum, Sungtae Lee, Chul-Heung Kim
Hardware-based Neural Networks using a Gated Schottky Diode as a Synapse Device. ISCAS 2018: 1-5 - [c1]Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo, Yoon-Joo Eom, Young-Sik Kim, Min-Su Ahn, Yong-Hun Kim, Sang-Hoon Jung, Sung-Geun Do, Chang-Yong Lee, Jae-Sung Kim, Dong-Seok Kang, Kyung-Bae Park, Jung-Bum Shin, Jong-Ho Lee, Seung-Hoon Oh, Sang-Yong Lee, Ji-Hak Yu, Ji-Suk Kwon, Ki-Hun Yu, Chul-Hee Jeon, Sang-Sun Kim, Min-Woo Won, Gun-hee Cho, Hyun-Soo Park, Hyung-Kyu Kim, Jeong-Woo Lee, Seung-Hyun Cho, Keon-Woo Park, Jae-Koo Park, Yong Jae Lee, Yong-Jun Kim, Young-Hun Seo, Beob-Rae Cho, Chang-Ho Shin, ChanYong Lee, YoungSeok Lee, Yoon-Gue Song, Sam-Young Bang, Youn-Sik Park, Seouk-Kyu Choi, Byeong-Cheol Kim, Gong-Heum Han, Seung-Jun Bae, Hyuk-Jun Kwon, Jung-Hwan Choi, Young-Soo Sohn, Kwang-Il Park, Seong-Jin Jang:
A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking. ISSCC 2018: 204-206 - [i2]Soochang Lee, Chul-Heung Kim, Seongbin Oh, Byung-Gook Park, Jong-Ho Lee:
Unsupervised Online Learning With Multiple Postsynaptic Neurons Based on Spike-Timing-Dependent Plasticity Using a TFT-Type NOR Flash Memory Array. CoRR abs/1811.07115 (2018) - 2017
- [i1]Suhwan Lim, Jong-Ho Bae, Jai-Ho Eum, Sungtae Lee, Chul-Heung Kim, Byung-Gook Park, Jong-Ho Lee:
Adaptive Learning Rule for Hardware-based Deep Neural Networks Using Electronic Synapse Devices. CoRR abs/1707.06381 (2017) - 2013
- [j1]Sang Wan Kim, Woo Young Choi
L-Shaped Tunneling Field-Effect Transistors for Complementary Logic Applications. IEICE Trans. Electron. 96-C(5): 634-638 (2013)
Coauthor Index
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