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Harideep Nair
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2020 – today
- 2024
- [j3]Shanmuga Venkatachalam, Harideep Nair
, Ming Zeng, Cathy Tan, Ole J. Mengshoel, John Paul Shen:
Corrigendum: SemNet: Learning semantic attributes for human activity recognition with deep belief networks. Frontiers Big Data 6 (2024) - [j2]Prabhu Vellaisamy
TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering. IEEE Trans. Circuits Syst. II Express Briefs 71(5): 2519-2523 (2024) - [c12]Harideep Nair, David Barajas-Jasso, Quinn Jacobson, John Paul Shen:
TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP Learning. AICAS 2024: 189-193 - [c11]Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen:
Realtime Person Identification via Gait Analysis Using IMU Sensors on Edge Devices. ICONS 2024: 371-375 - [c10]Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen:
Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators. ISVLSI 2024: 661-665 - [c9]Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen:
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors. NICE 2024: 1-9 - [c8]Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen:
Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference. VLSI-SoC 2024: 1-4 - [i8]Harideep Nair
OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference. CoRR abs/2402.19376 (2024) - [i7]Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen:
Realtime Person Identification via Gait Analysis. CoRR abs/2404.15312 (2024) - [i6]Harideep Nair, William Leyman, Agastya Sampath, Quinn Jacobson, John Paul Shen:
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors. CoRR abs/2405.11844 (2024) - 2023
- [c7]Harideep Nair
tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI. ISCAS 2023: 1-5 - [c6]Prabhu Vellaisamy, Harideep Nair
tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. ISVLSI 2023: 1-6 - 2022
- [j1]Shanmuga Venkatachalam, Harideep Nair
SemNet: Learning semantic attributes for human activity recognition with deep belief networks. Frontiers Big Data 5 (2022) - [c5]Harideep Nair
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. ISVLSI 2022: 152-157 - [i5]Harideep Nair
TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. CoRR abs/2205.07410 (2022) - 2021
- [c4]Shreyas Chaudhari, Harideep Nair
Unsupervised Clustering of Time Series Signals Using Neuromorphic Energy-Efficient Temporal Neural Networks. ICASSP 2021: 7873-7877 - [c3]Harideep Nair
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks. ISVLSI 2021: 266-271 - [i4]Shreyas Chaudhari, Harideep Nair, José M. F. Moura, John Paul Shen:
Unsupervised Clustering of Time Series Signals using Neuromorphic Energy-Efficient Temporal Neural Networks. CoRR abs/2102.09200 (2021) - [i3]Harideep Nair, John Paul Shen, James E. Smith:
A Microarchitecture Implementation Framework for Online Learning with Temporal Neural Networks. CoRR abs/2105.13262 (2021) - 2020
- [i2]Harideep Nair, John Paul Shen, James E. Smith:
Direct CMOS Implementation of Neuromorphic Temporal Neural Networks for Sensory Processing. CoRR abs/2009.00457 (2020)
2010 – 2019
- 2019
- [c2]Harideep Nair
AttriNet: learning mid-level features for human activity recognition with deep belief networks. UbiComp/ISWC Adjunct 2019: 510-517 - [c1]Raj Kumar Choudhary, Newton Singh
Freeflow Core: Enhancing Performance of In-Order Cores with Energy Efficiency. ICCD 2019: 702-705 - [i1]Sai Vineeth Kalluru Srinivas, Harideep Nair, Vinay Vidyasagar:
Hardware Aware Neural Network Architectures using FbNet. CoRR abs/1906.07214 (2019)
Coauthor Index
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