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Vivek Joshi
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2020 – today
- 2022
- [c26]Preethu Rose Anish, Prashant Lawhatre, Ranit Chatterjee, Vivek Joshi, Smita Ghaisas:
Automated Labeling and Classification of Business Rules from Software Requirement Specifications. ICSE (SEIP) 2022: 53-54 - 2021
- [c25]Preethu Rose Anish, Vivek Joshi, Pratik Sonar, Smita Ghaisas:
Writaupair: Assistive Platform for Children with Writing Difficulties. IRI 2021: 380-384 - [c24]Vivek Joshi, Preethu Rose Anish, Smita Ghaisas:
Domain adaptation for an automated classification of deontic modalities in software engineering contracts. ESEC/SIGSOFT FSE 2021: 1275-1280 - 2020
- [c23]Abhishek Sainani, Preethu Rose Anish, Vivek Joshi, Smita Ghaisas:
Extracting and Classifying Requirements from Software Engineering Contracts. RE 2020: 147-157
2010 – 2019
- 2019
- [c22]Preethu Rose Anish, Vivek Joshi, Abhishek Sainani, Smita Ghaisas:
Towards enhanced accountability in complying with healthcare regulations. SEH@ICSE 2019: 25-28 - [c21]Zhipeng Dong, Xi Cao, M. Ahosan Ul Karim, Vivek Joshi, Torsten Klick, Joerg Schmid:
Simulation Based Assessment of SRAM Data Retention Voltage. ISQED 2019: 98-103 - 2018
- [c20]Mingcheng Chang, Nigel Chan, Vivek Joshi, Sandra Hecker, Udo Ziller, Petra Poth, Alban Zaka, Tom Herrmann, Seunghwan Seo, Hongsik Yoon, Xin Zou, Zhen Xu, Hema Ramamurthy, Torsten Klick, Gabriele Congedo, Youmean Lee, Elke Erben, Gerd Zschaetzsch, Juergen Faul, Jon Kluth, Joerg Schmid, Ralf Van Bentum, Chad Weintraub:
Novel Back Gate Doping Ultra Low Retention Power 22nm FDSOl SRAM for IOT Application. ESSDERC 2018: 78-81 - [c19]Xiaoliu Zhang, Cheng Chen, Sean Boone, Vivek Joshi
, Arakua Welbeck, Guoyuan Liang, Gregory Chang, Punam K. Saha
MRI-based active shape model of the human proximal femur using fiducial and secondary landmarks and its validation. Biomedical Applications in Molecular, Structural, and Functional Imaging 2018: 105781L - [c18]Motoi Ichihashi, Youngtag Woo, Muhammed Ahosan Ul Karim, Vivek Joshi, David Burnett:
10T Differential-Signal SRAM Design in a L4-NM FinFET Technology for High-Speed Application. SoCC 2018: 322-325 - 2016
- [c17]Sriram Balasubramanian, Ninad Pimparkar, Mangesh Kushare, Vinayak Mahajan, Juhi Bansal, Takashi Shimizu, Vivek Joshi, Kun Qian, Arunima Dasgupta, Karthik Chandrasekaran, Chad Weintraub, Ali Icel:
Near-threshold circuit variability in 14nm FinFETs for ultra-low power applications. ISQED 2016: 258-262 - 2015
- [c16]David Burnett, Sriram Balasubramanian, Vivek Joshi, Sanjay Parihar
SRAM Vmax stability considerations. IRPS 2015: 6 - [c15]Yoann Mamy Randriamihaja, William McMahon, S. Balasubramanian, Tanya Nigam, Biju Parameshwaran, Randy W. Mann, Torsten Klick, T. Schaefer, A. Kumar, Y. Song, Vivek Joshi, Rakesh Ranjan, F. Chen:
Assessing intrinsic and extrinsic end-of-life risk using functional SRAM wafer level testing. IRPS 2015: 6 - 2014
- [j4]Vivek Joshi
PACS Administrators' and Radiologists' Perspective on the Importance of Features for PACS Selection. J. Digit. Imaging 27(4): 486-495 (2014) - [c14]S. Balasubramanian, Vivek Joshi, Torsten Klick, Randy W. Mann, Joseph Versaggi, Akhilesh Gautam, C. Weintraub, G. Kurz, G. Krause, Andreas Kerber, Biju Parameshwaran, Tanya Nigam:
HTOL SRAM Vmin shift considerations in scaled HKMG technologies. CICC 2014: 1-4 - 2013
- [c13]Sriramkumar Venugopalan, Vivek Joshi, Luis Zamudio, Matthias Goldbach, Gert Burbach, Ralf Van Bentum, Sriram Balasubramanian:
SRAM read current variability and its dependence on transistor statistics. CICC 2013: 1-4 - 2012
- [c12]Vivek Joshi, Kanak Agarwal, Dennis Sylvester:
Design-patterning co-optimization of SRAM robustness for double patterning lithography. ASP-DAC 2012: 713-718 - 2011
- [j3]Vivek Joshi
Empirical Investigation of Radiologists' Priorities for PACS Selection: An Analytical Hierarchy Process Approach. J. Digit. Imaging 24(4): 700-708 (2011) - 2010
- [j2]Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal:
Mechanical Stress Aware Optimization for Leakage Power Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(5): 722-736 (2010) - [c11]Vivek Joshi, Kanak Agarwal, Dennis Sylvester, David T. Blaauw:
Analyzing electrical effects of RTA-driven local anneal temperature variation. ASP-DAC 2010: 739-744 - [c10]Vivek Joshi, Michael Wieckowski, Gregory K. Chen, David T. Blaauw, Dennis Sylvester:
Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS. CICC 2010: 1-4 - [c9]Vivek Joshi, Valeriy Sukharev
Closed-form modeling of layout-dependent mechanical stress. DAC 2010: 673-678 - [c8]Vivek Joshi, Kanak Agarwal, David T. Blaauw, Dennis Sylvester:
Analysis and optimization of SRAM robustness for double patterning lithography. ICCAD 2010: 25-31 - [c7]Vivek Joshi, Kanak Agarwal, Dennis Sylvester:
Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices. ISQED 2010: 158-162
2000 – 2009
- 2009
- [j1]Rajeev R. Rao, Vivek Joshi, David T. Blaauw, Dennis Sylvester:
Circuit optimization techniques to mitigate the effects of soft errors in combinational logic. ACM Trans. Design Autom. Electr. Syst. 15(1): 5:1-5:27 (2009) - [c6]Radhakrishna Naik, Vivek Joshi, Ramchandra R. Manthalkar
IUF Scheduling Algorithm for Improving the Schedulability, Predictability and Sustainability of the Real Time System. ICETET 2009: 998-1003 - 2008
- [c5]Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal:
Leakage power reduction using stress-enhanced layouts. DAC 2008: 912-917 - [c4]Brian Cline, Vivek Joshi, Dennis Sylvester, David T. Blaauw:
STEEL: a technique for stress-enhanced standard cell library design. ICCAD 2008: 691-697 - [c3]Vivek Joshi, Brian Cline, Dennis Sylvester, David T. Blaauw, Kanak Agarwal:
Stress aware layout optimization. ISPD 2008: 168-174 - 2007
- [c2]Vivek Joshi, David T. Blaauw, Dennis Sylvester:
Soft-edge flip-flops for improved timing yield: design and optimization. ICCAD 2007: 667-673 - 2006
- [c1]Vivek Joshi, Rajeev R. Rao, David T. Blaauw, Dennis Sylvester:
Logic SER Reduction through Flipflop Redesign. ISQED 2006: 611-616
Coauthor Index
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