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Sung-Bae Park
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2010 – 2019
- 2010
- [j10]Hyun-min Kyung, Gi-Ho Park, Jong Wook Kwak
, Tae-Jin Kim, Sung-Bae Park:
Design and implementation of Performance Analysis Unit (PAU) for AXI-based multi-core System on Chip (SOC). Microprocess. Microsystems 34(2-4): 102-116 (2010)
2000 – 2009
- 2009
- [j9]Gi-Ho Park, Jung-Wook Park
A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache. IEICE Trans. Electron. 92-C(4): 517-521 (2009) - 2008
- [j8]Gunok Jung, Chunghee Kim, Kyoungkuk Chae, Gi-Ho Park, Sung-Bae Park:
Power and Skew Aware Point Diffusion Clock Network. IEICE Trans. Electron. 91-C(11): 1832-1834 (2008) - [j7]Inhwa Jung, Gunok Jung, Janghoon Song, Moo-young Kim, Junyoung Park, Sung-Bae Park, Chulwoo Kim:
A 0.004-mm2 Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor. IEEE Trans. Circuits Syst. II Express Briefs 55-II(2): 116-120 (2008) - [c9]Gunok Jung, Sahun Hong, Donggyu Lee, Jin-Soo Park, Sangdon Yi, Yohan Kwon, Ukrae Cho, Sung-Bae Park:
Skew variation compensating technique for clock mesh networks. APCCAS 2008: 894-897 - 2007
- [j6]Min-su Kim, Young-Hyun Jun, Sung-Bae Park, Bai-Sun Kong:
CMOS Level Converter with Balanced Rise and Fall Delays. IEICE Trans. Electron. 90-C(1): 192-195 (2007) - [j5]Sung-Bae Park, Suhwan Kim:
Introduction to the Special Issue on the 2006 Asian Solid-State Circuits Conference (A-SSCC'06). IEEE J. Solid State Circuits 42(11): 2323-2325 (2007) - [c8]Min-su Kim, Bai-Sun Kong, Chil-Gee Lee, Tae-Hyung Kim, Sung-Bae Park, Young-Hyun Jim:
Nonoverlapping Cuspid-Pulsed Flip-Flop. ICECS 2007: 158-161 - [c7]Hyun-min Kyung, Gi-Ho Park, Jong Wook Kwak, WooKyeong Jeong, Tae-Jin Kim, Sung-Bae Park:
Performance monitor unit design for an AXI-based multi-core SoC platform. SAC 2007: 1565-1572 - 2006
- [j4]Sung Woo Chung, Gi-Ho Park, Hyo-Joong Suh, Han-Jong Kim, Jung-Bin Im, Jung-Wook Park
Sim-ARM1136: A case study on the accuracy of the cycle-accurate simulator. Microprocess. Microsystems 30(3): 137-144 (2006) - [j3]Jung-Wook Park
A deterministic way-prediction scheme using power-aware replacement policy. Microprocess. Microsystems 30(4): 209-215 (2006) - [c6]Gi-Ho Park, Sung Woo Chung, Han-Jong Kim, Jung-Bin Im, Jung-Wook Park
Practice and Experience of an Embedded Processor Core Modeling. HPCC 2006: 621-630 - 2005
- [c5]Sung-Bae Park:
DLV (Deep Low Voltage): Circuits and Devices. PATMOS 2005: 748 - 2004
- [j2]Sung Woo Chung, Gi-Ho Park, Sung-Bae Park:
A Low-Power Tournament Branch Predictor. IEICE Trans. Inf. Syst. 87-D(7): 1962-1964 (2004) - [j1]Sung Woo Chung, Gi-Ho Park, Sung-Bae Park:
A Low-Power Branch Predictor for Embedded Processors. IEICE Trans. Inf. Syst. 87-D(9): 2253-2257 (2004) - [c4]Sung Woo Chung, Sung-Bae Park:
A Low Power Branch Predictor to Selectively Access the BTB. Asia-Pacific Computer Systems Architecture Conference 2004: 374-384 - [c3]Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Dug Kim:
Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure. ICCD 2004: 42-47 - [c2]Jangmin O, Jae Won Lee, Sung-Bae Park, Byoung-Tak Zhang:
Stock Trading by Modelling Price Trend with Dynamic Bayesian Networks. IDEAL 2004: 794-799 - 2003
- [c1]Jung-Hoon Lee, Gi-Ho Park, Sung-Bae Park, Shin-Dug Kim:
A selective filter-bank TLB system. ISLPED 2003: 312-317
Coauthor Index
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