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Paul Detterer
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2020 – today
- 2024
- [c10]Lucas Huijbregts
, Hsiao-Hsuan Liu
Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning. DAC 2024: 260:1-260:6 - [c9]Alberto Patiño-Saucedo, Roy Meijer, Paul Detterer, Amirreza Yousefzadeh
Co-optimized training of models with synaptic delays for digital neuromorphic accelerators. ISCAS 2024: 1-5 - [c8]Anoop Narayan Bhat, Paul Mateman, Zule Xu, Peter Vis, Paul Detterer, Gururaja Kasanadi Ramachandra, Yunus Baykal, Mario Konijnenburg, Yao-Hong Liu, Christian Bachmann, Peng Zhang:
23.5 A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-End. ISSCC 2024: 408-410 - [i5]Alberto Patiño-Saucedo, Roy Meijer, Amirreza Yousefzadeh
Hardware-aware training of models with synaptic delays for digital event-driven neuromorphic processors. CoRR abs/2404.10597 (2024) - [i4]Alexandra F. Dobrita, Amirreza Yousefzadeh, Simon Thorpe, Kanishkan Vadivel, Paul Detterer, Guangzhi Tang, Gert-Jan van Schaik, Mario Konijnenburg, Anteneh Gebregiorgis, Said Hamdioui, Manolis Sifalakis:
EON-1: A Brain-Inspired Processor for Near-Sensor Extreme Edge Online Feature Extraction. CoRR abs/2406.17285 (2024) - [i3]Cina Arjmand, Yingfu Xu, Kevin Shidqi, Alexandra F. Dobrita, Kanishkan Vadivel, Paul Detterer, Manolis Sifalakis, Amirreza Yousefzadeh, Guangzhi Tang:
TRIP: Trainable Region-of-Interest Prediction for Hardware-Efficient Neuromorphic Processing on Event-based Vision. CoRR abs/2406.17483 (2024) - [i2]Lucas Huijbregts, Hsiao-Hsuan Liu, Paul Detterer, Said Hamdioui, Amirreza Yousefzadeh, Rajendra Bishnoi:
Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning. CoRR abs/2410.09130 (2024) - 2023
- [c7]Réda Nouacer
Towards a European Network of Enabling Technologies for Drones. DroneSE/RAPIDO@HiPEAC 2023: 1-11 - [c6]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. ISCAS 2023: 1-5 - [i1]Guangzhi Tang, Ali Safa, Kevin Shidqi, Paul Detterer, Stefano Traferro, Mario Konijnenburg, Manolis Sifalakis, Gert-Jan van Schaik, Amirreza Yousefzadeh:
Open the box of digital neuromorphic processor: Towards effective algorithm-hardware co-design. CoRR abs/2303.15224 (2023) - 2022
- [j3]Paul Detterer
Receiver Design With an Adjustable Energy-Signal-Quality Tradeoff for IoT Networks. IEEE Internet Things J. 9(22): 23086-23096 (2022) - [j2]Yuming He
An Implantable Neuromorphic Sensing System Featuring Near-Sensor Computation and Send-on-Delta Transmission for Wireless Neural Sensing of Peripheral Nerves. IEEE J. Solid State Circuits 57(10): 3058-3070 (2022) - [c5]Amirreza Yousefzadeh, Gert-Jan van Schaik, Mohammad Tahghighi, Paul Detterer, Stefano Traferro, Martijn Hijdra, Jan Stuijt, Federico Corradi
SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture. AICAS 2022: 371-374 - [c4]Anand Sankaran, Paul Detterer, Kalpana Kannan, Nikolaos Alachiotis, Federico Corradi
An Event-driven Recurrent Spiking Neural Network Architecture for Efficient Inference on FPGA. ICONS 2022: 12:1-12:8 - 2021
- [j1]Paul Detterer
Receiver-Sensitivity Control for Energy-Efficient IoT Networks. IEEE Commun. Lett. 25(4): 1383-1386 (2021) - 2020
- [c3]Paul Detterer
Trading Sensitivity for Power in an IEEE 802.15.4 Conformant Adequate Demodulator. DATE 2020: 1674-1679
2010 – 2019
- 2019
- [c2]Paul Detterer
Trading Digital Accuracy for Power in an RSSI Computation of a Sensor Network Transceiver. DATE 2019: 102-107 - 2018
- [c1]Paul Detterer
Understanding the Impact of Circuit-Level Inaccuracy on Sensor Network Performance. PE-WASUN 2018: 107-114
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