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Luis Alberto Aranda
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2020 – today
- 2022
- [j10]Luis Alberto Aranda
, Oscar Ruano
ACME-2: Improving the Extraction of Essential Bits in Xilinx SRAM-Based FPGAs. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1577-1581 (2022) - 2021
- [j9]Luis Alberto Aranda
Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs. IEEE Access 9: 140676-140685 (2021) - [j8]Oscar Ruano
Fault Injection Emulation for Systems in FPGAs: Tools, Techniques and Methodology, a Tutorial. Sensors 21(4): 1392 (2021) - 2020
- [j7]Luis Alberto Aranda
Radiation Hardened Digital Direct Synthesizer With CORDIC for Spaceborne Applications. IEEE Access 8: 83167-83176 (2020) - [j6]Luis Alberto Aranda
Toward a Fault-Tolerant Star Tracker for Small Satellite Applications. IEEE Trans. Aerosp. Electron. Syst. 56(5): 3421-3431 (2020) - [j5]Luis Alberto Aranda
An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1336-1340 (2020)
2010 – 2019
- 2019
- [j4]Luis Alberto Aranda
ACME: A Tool to Improve Configuration Memory Fault Injection in SRAM-Based FPGAs. IEEE Access 7: 128153-128161 (2019) - [j3]Luis Alberto Aranda
Protection Scheme for Star Tracker Images. IEEE Trans. Aerosp. Electron. Syst. 55(1): 486-492 (2019) - [j2]Alfonso Sánchez-Macián
Enhancing Instruction TLB Resilience to Soft Errors. IEEE Trans. Computers 68(2): 214-224 (2019) - 2018
- [j1]Luis Alberto Aranda
A Comparison of Dual Modular Redundancy and Concurrent Error Detection in Finite Impulse Response Filters Implemented in SRAM-Based FPGAs Through Fault Injection. IEEE Trans. Circuits Syst. II Express Briefs 65-II(3): 376-380 (2018)
Coauthor Index
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