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Seyed Alireza Zahrai
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2010 – 2019
- 2019
- [c6]Marina Zlochisti, Seyed Alireza Zahrai, Nicolas Le Dortz, Marvin Onabajo:
Comparator Design and Calibration for Flash ADCs within Two-Step ADC Architectures. ISCAS 2019: 1-5 - 2018
- [c5]Seyed Alireza Zahrai, Marina Zlochisti, Nicolas Le Dortz, Marvin Onabajo:
Design Considerations and Experimental Verification of a 10.5mW 1GS/s Hybrid ADC for Portable Wireless Devices. ISCAS 2018: 1-5 - 2017
- [j2]Chun-hsiang Chang, Seyed Alireza Zahrai, Kainan Wang, Li Xu
, Ibrahim Farah, Marvin Onabajo
An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(10): 2666-2678 (2017) - [j1]Seyed Alireza Zahrai, Marina Zlochisti, Nicolas Le Dortz, Marvin Onabajo
A Low-Power High-Speed Hybrid ADC With Merged Sample-and-Hold and DAC Functions for Efficient Subranging Time-Interleaved Operation. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3193-3206 (2017) - [c4]Seyed Alireza Zahrai, Nicolas Le Dortz, Marvin Onabajo:
Design of clock generation circuitry for high-speed subranging time-interleaved ADCs. ISCAS 2017: 1-4 - 2015
- [c3]Seyed Alireza Zahrai, Marvin Onabajo:
A low-power hybrid ADC architecture for high-speed medium-resolution applications. MWSCAS 2015: 1-4 - [c2]Seyed Alireza Zahrai, Li Xu
On-chip digital calibration for automatic input impedance boosting during biopotential measurements. MWSCAS 2015: 1-4 - [c1]Marina Zlochisti, Seyed Alireza Zahrai, Marvin Onabajo:
Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures. MWSCAS 2015: 1-4
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