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Hsuan Hsiao
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2020 – today
- 2022
- [c9]Hsuan Hsiao, Joshua San Miguel
, Jason Helge Anderson:
Streaming Accuracy: Characterizing Early Termination in Stochastic Computing. ASP-DAC 2022: 320-325 - [i1]Hsuan Hsiao, Vincent T. Lee, Brandon Reagen, Armin Alaghi:
Homomorphically Encrypted Computation using Stochastic Encodings. CoRR abs/2203.02547 (2022) - 2021
- [j2]Di Wu
uGEMM: Unary Computing for GEMM Applications. IEEE Micro 41(3): 50-56 (2021) - [c8]Jason Helge Anderson, Rami Beidas, Vimal Chacko, Hsuan Hsiao, Xiaoyi Ling, Omar Ragheb, Xinyuan Wang, Tianyi Yu:
CGRA-ME: An Open-Source Framework for CGRA Architecture and CAD Research : (Invited Paper). ASAP 2021: 156-162 - [c7]Xinyuan Wang, Tianyi Yu, Hsuan Hsiao, Jason Helge Anderson:
Double-Pumping the Interconnect for Area Reduction in Coarse-Grained Reconfigurable Arrays. ASAP 2021: 242-249 - [c6]Hsuan Hsiao, Joshua San Miguel
Zero Correlation Error: A Metric for Finite-Length Bitstream Independence in Stochastic Computing. ASP-DAC 2021: 260-265 - 2020
- [c5]Di Wu, Jingjie Li, Ruokai Yin
UGEMM: Unary Computing Architecture for GEMM Applications. ISCA 2020: 377-390
2010 – 2019
- 2019
- [c4]Hsuan Hsiao, Jason Helge Anderson:
Thread Weaving: Static Resource Scheduling for Multithreaded High-Level Synthesis. DAC 2019: 2 - 2018
- [c3]Hsuan Hsiao, Jason Helge Anderson:
Sensei: An area-reduction advisor for FPGA high-level synthesis. DATE 2018: 25-30 - [c2]Samridhi Bansal, Hsuan Hsiao, Tomasz S. Czajkowski, Jason Helge Anderson:
High-level synthesis of software-customizable floating-point cores. DATE 2018: 37-42 - [c1]Joshua San Miguel
The EH Model: Early Design Space Exploration of Intermittent Processor Architectures. MICRO 2018: 600-612 - 2016
- [j1]Razvan Nane
A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(10): 1591-1604 (2016) - [p1]Andrew Canis, Jongsok Choi, Blair Fort, Bain Syrowik, Ruolong Lian, Yu Ting Chen, Hsuan Hsiao, Jeffrey B. Goeders, Stephen Dean Brown, Jason Helge Anderson:
LegUp High-Level Synthesis. FPGAs for Software Programmers 2016: 175-190
Coauthor Index
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