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Luca Pezzarossa
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2020 – today
- 2024
- [c20]Martin Schoeberl, Hans Jakob Damsgaard, Luca Pezzarossa, Oliver Keszöcze, Erling Rennemo Jellum:
Hardware Generators with Chisel. DSD 2024: 168-175 - [c19]Alessandro Cerioli, Riccardo Miccini, Clément Laroche, Tobias Piechowiak, Luca Pezzarossa, Jens Sparsø, Martin Schoeberl:
NeuralCasting: A Front-End Compilation Infrastructure for Neural Networks. IOTSMS 2024: 161-168 - [c18]Ehsan Khodadad
, Luca Pezzarossa, Martin Schoeberl
Towards Lingua Franca on the Patmos Processor. ISORC 2024: 1-5 - [c17]Emad Jacob Maroun, Luca Pezzarossa, Martin Schoeberl:
Caching in a Mixed-Criticality 5G Radio Base Station. RAW 2024: 51-61 - [c16]Martin Schoeberl, Ehsan Khodadad
Invited Paper: Worst-Case Execution Time Analysis of Lingua Franca Applications. WCET 2024: 4:1-4:13 - [i2]Riccardo Miccini
Towards a tailored mixed-precision sub-8-bit quantization scheme for Gated Recurrent Units using Genetic Algorithms. CoRR abs/2402.12263 (2024) - 2023
- [j5]Martin Schoeberl
Chip Design and Verification in a Computer Engineering Education. Computer 56(11): 20-29 (2023) - [c15]Jianan Xu, Wenjie Fan, Jan Madsen
AI-Based Detection of Droplets and Bubbles in Digital Microfluidic Biochips. DATE 2023: 1-6 - [c14]Riccardo Miccini
Dynamic nsNET2: Efficient Deep Noise Suppression with Early Exiting. MLSP 2023: 1-6 - [c13]Charalampos Orfanidis
Intermittent Low-Power Wide Area Networks. MobiCom 2023: 122:1-122:3 - [c12]Luca Pezzarossa, Martin Schoeberl
Transitioning to Chisel in University Education: Experiences and Lessons Learned. NorCAS 2023: 1-7 - [i1]Riccardo Miccini, Alaa Zniber, Clément Laroche, Tobias Piechowiak, Martin Schoeberl, Luca Pezzarossa, Ouassim Karrakchou, Jens Sparsø, Mounir Ghogho:
Dynamic nsNet2: Efficient Deep Noise Suppression with Early Exiting. CoRR abs/2308.16678 (2023) - 2022
- [c11]Syed Anas Alam, Jakob Furbo Enevoldsen, Andreas Alkjaer Eriksen, Niels William Hartmann, Ulrik Helk, Jphirgen Kragh Jakobsen, Christa Skytte Jensen, Nicolai Dyre Bülow Jespersen, Karl Herman Krause, Mads Rumle Nordstrphim, Tjark Petersen, Luca Pezzarossa, Simon Winther Rasmussen, Martin Schoeberl
Open-Source Chip Design in Academic Education. NorCAS 2022: 1-6 - 2020
- [j4]Eleftherios Kyriakakis, Maja Lund, Luca Pezzarossa, Jens Sparsø
A time-predictable open-source TTEthernet end-system. J. Syst. Archit. 108: 101744 (2020)
2010 – 2019
- 2019
- [c10]Martin Schoeberl
A Minimal Network Interface for a Simple Network-on-Chip. ARCS 2019: 295-307 - [c9]Maja Lund, Luca Pezzarossa, Jens Sparsø
A Time-predictable TTEthenet Node. ISORC 2019: 229-233 - [c8]Martin Schoeberl
S4NOC: a minimalistic network-on-chip for real-time multicores. NoCArc@MICRO 2019: 8:1-8:6 - 2018
- [b1]Luca Pezzarossa:
Reconfiguration of Computation and Communication Resources in Multi-Core Real-Time Embedded Systems. Technical University of Denmark, 2018 - [j3]Martin Schoeberl
A Multicore Processor for Time-Critical Applications. IEEE Des. Test 35(2): 38-47 (2018) - [j2]Luca Pezzarossa, Andreas Toftegaard Kristensen
Using dynamic partial reconfiguration of FPGAs in real-Time systems. Microprocess. Microsystems 61: 198-206 (2018) - 2017
- [j1]Rasmus Bo Sørensen, Luca Pezzarossa, Martin Schoeberl
A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip. J. Syst. Archit. 74: 1-13 (2017) - [c7]Luca Pezzarossa, Martin Schoeberl
A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems. ISORC 2017: 92-100 - [c6]Daniel Sanz Ausin, Luca Pezzarossa, Martin Schoeberl:
Real-Time Audio Processing on the T-Crest Multicore Platform. MCSoC 2017: 120-127 - [c5]Andreas Toftegaard Kristensen
High-level synthesis for reduction of WCET in real-time systems. NORCAS 2017: 1-6 - [c4]Luca Pezzarossa, Andreas Toftegaard Kristensen
Can real-time systems benefit from dynamic partial reconfiguration? NORCAS 2017: 1-6 - 2016
- [c3]Rasmus Bo Sørensen, Luca Pezzarossa, Jens Sparsø
An area-efficient TDM NoC supporting reconfiguration for mode changes. NOCS 2016: 1-4 - [c2]Luca Pezzarossa, Martin Schoeberl
Reconfiguration in FPGA-based multi-core platforms for hard real-time applications. ReCoSoC 2016: 1-8 - 2015
- [c1]Luca Pezzarossa, Rasmus Bo Sørensen, Martin Schoeberl
Interfacing hardware accelerators to a time-division multiplexing network-on-chip. NORCAS 2015: 1-4
Coauthor Index
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