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H. Gregor Molter
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2010 – 2019
- 2012
- [b1]H. Gregor Molter:
SynDEVS co-design flow: a hardware-, software co-design flow based on the discrete event system specification model of computation. Darmstadt University of Technology, Springer Vieweg 2012, ISBN 978-3-658-00396-8, pp. 1-198 - [c8]H. Gregor Molter
, Johannes Kohlmann, Sorin A. Huss:
Automated Generation of Embedded Systems Software from Timed DEVS Model of Computation Specifications. DSD 2012: 700-707 - 2011
- [j3]H. Gregor Molter
A simple power analysis attack on a McEliece cryptoprocessor. J. Cryptogr. Eng. 1(1): 29-36 (2011) - [j2]Abdulhadi Shoufan
A novel cryptoprocessor architecture for chained Merkle signature scheme. Microprocess. Microsystems 35(1): 34-47 (2011) - [c7]H. Gregor Molter
State space optimization within the DEVS model of computation for timing efficiency. VLSI-SoC 2011: 422-427 - 2010
- [j1]Abdulhadi Shoufan
A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem. IEEE Trans. Computers 59(11): 1533-1546 (2010)
2000 – 2009
- 2009
- [c6]Abdulhadi Shoufan
A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms. ASAP 2009: 98-105 - [c5]Felix Madlener, H. Gregor Molter, Sorin A. Huss:
SC-DEVS: An efficient SystemC extension for the DEVS model of computation. DATE 2009: 1518-1523 - [c4]H. Gregor Molter, André Seffrin, Sorin Alexander Huss:
DEVS2VHDL: Automatic transformation of XML-specified DEVS Model of Computation into synthesizable VHDL code. FDL 2009: 1-6 - [c3]Abdulhadi Shoufan
A Timing Attack against Patterson Algorithm in the McEliece PKC. ICISC 2009: 161-175 - 2008
- [c2]Ralf Laue, H. Gregor Molter
A Novel Multiple Core Co-processor Architecture for Efficient Server-Based Public Key Cryptographic Applications. ISVLSI 2008: 87-92 - [c1]Falko Strenzke, Erik Tews, H. Gregor Molter
Side Channels in the McEliece PKC. PQCrypto 2008: 216-229
Coauthor Index
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