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Marc Riera
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2020 – today
- 2024
- [j7]Dennis Pinto
, José-María Arnau, Marc Riera
Mixture-of-Rookies: Saving DNN computations by predicting ReLU outputs. Microprocess. Microsystems 109: 105087 (2024) - [j6]Dennis Pinto, José-María Arnau, Marc Riera, José-Lorenzo Cruz, Antonio González:
Exploiting beam search confidence for energy-efficient speech recognition. J. Supercomput. 80(17): 24908-24937 (2024) - [c8]Xavi Ivars-Ribes, Jordi Mas, Marc Riera, Jaume Ortolà, Mikel Forcada, David Cànovas:
Community-driven machine translation for the Catalan language at Softcatalà. EAMT (2) 2024: 45-46 - [c7]Mohammad Sabri Abrebekoh
ReDy: A Novel ReRAM-centric Dynamic Quantization Approach for Energy-efficient CNNs. ICPP 2024: 1042-1051 - [i7]Mohammad Sabri, Marc Riera, Antonio González:
ARAS: An Adaptive Low-Cost ReRAM-Based Accelerator for DNNs. CoRR abs/2410.17931 (2024) - 2023
- [c6]Bahareh Khabbazan, Marc Riera, Antonio González:
QeiHaN: An Energy-Efficient DNN Accelerator that Leverages Log Quantization in NDP Architectures. PACT 2023: 325-326 - [c5]Bahareh Khabbazan, Marc Riera, Antonio González:
DNA-TEQ: An Adaptive Exponential Quantization of Tensors for DNN Inference. HiPC 2023: 1-10 - [i6]Mohammad Sabri Abrebekoh, Marc Riera, Antonio González:
ReDy: A Novel ReRAM-centric Dynamic Quantization Approach for Energy-efficient CNN Inference. CoRR abs/2306.16298 (2023) - [i5]Bahareh Khabbazan, Marc Riera, Antonio González:
DNA-TEQ: An Adaptive Exponential Quantization of Tensors for DNN Inference. CoRR abs/2306.16430 (2023) - [i4]Bahareh Khabbazan, Marc Riera, Antonio González:
An Energy-Efficient Near-Data Processing Accelerator for DNNs that Optimizes Data Accesses. CoRR abs/2310.18181 (2023) - 2022
- [j5]Marc Riera
DNN pruning with principal component analysis and connection importance estimation. J. Syst. Archit. 122: 102336 (2022) - [j4]Marc Riera
CREW: Computation reuse and efficient weight storage for hardware-accelerated MLPs and RNNs. J. Syst. Archit. 129: 102604 (2022) - [j3]Mehdi Hassanpour
A Survey of Near-Data Processing Architectures for Neural Networks. Mach. Learn. Knowl. Extr. 4(1): 66-102 (2022) - 2021
- [i3]Marc Riera, José-María Arnau, Antonio González:
CREW: Computation Reuse and Efficient Weight Storage for Hardware-accelerated MLPs and RNNs. CoRR abs/2107.09408 (2021) - [i2]Mehdi Hassanpour, Marc Riera, Antonio González:
A Survey of Near-Data Processing Architectures for Neural Networks. CoRR abs/2112.12630 (2021) - 2020
- [b1]Marc Riera:
Low-power accelerators for cognitive computing. Polytechnic University of Catalonia, Spain, 2020
2010 – 2019
- 2019
- [j2]Marc Riera, José-María Arnau, Antonio González:
CGPA: Coarse-Grained Pruning of Activations for Energy-Efficient RNN Inference. IEEE Micro 39(5): 36-45 (2019) - [j1]Alessandro Vallero
SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. IEEE Trans. Computers 68(5): 765-783 (2019) - [i1]Marc Riera, José-María Arnau, Antonio González:
(Pen-) Ultimate DNN Pruning. CoRR abs/1906.02535 (2019) - 2018
- [c4]Marc Riera, José-María Arnau, Antonio González:
Computation Reuse in DNNs by Exploiting Input Similarity. ISCA 2018: 57-68 - [c3]Reza Yazdani, Marc Riera, José-María Arnau, Antonio González:
The Dark Side of DNN Pruning. ISCA 2018: 790-801 - 2016
- [c2]Marc Riera, Ramon Canal, Jaume Abella, Antonio González:
A detailed methodology to compute Soft Error Rates in advanced technologies. DATE 2016: 217-222 - [c1]Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González
Cross-layer system reliability assessment framework for hardware faults. ITC 2016: 1-10
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last updated on 2024-12-10 20:46 CET by the dblp team
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