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Yanxiang Huang
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2020 – today
- 2024
- [c15]Saurabh Hukerikar, Atieh Lotfi, Yanxiang Huang, Jason Campbell, Nirmal R. Saxena:
Optimizing Large-Scale Fault Injection Experiments through Martingale Hypothesis: A Systematic Approach for Reliability Assessment of Safety-Critical Systems. DSN-S 2024: 111-117 - 2021
- [c14]Fei Jie, Yanxiang Huang, Qiangwei Bai, Xindong Wu:
HAO Unity: A Graph-based System for Unifying Heterogeneous Data. CIKM 2021: 4725-4729 - [c13]Xiaona Xue, Jinling Jiang, Wenjian Zhang, Yanxiang Huang, Xindong Wu:
A Chinese Knowledge Base Question Answering System. CIKM 2021: 4813-4816 - 2020
- [c12]Richard Bramley, Yanxiang Huang, Guangshan Duan, Nirmal R. Saxena, Paul Racunas:
On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors. ITC 2020: 1-10
2010 – 2019
- 2019
- [c11]Atieh Lotfi, Saurabh Hukerikar, Keshav Balasubramanian, Paul Racunas, Nirmal R. Saxena, Richard Bramley, Yanxiang Huang:
Resiliency of automotive object detection networks on GPU architectures. ITC 2019: 1-9 - 2018
- [j4]Chunshu Li, Yanxiang Huang, Khaled Khalaf, André Bourdoux, Marian Verhelst
, Liesbet Van der Perre
Energy-Efficient Digital Front-End Processor for 60 GHz Polar Transmitter. J. Signal Process. Syst. 90(5): 777-789 (2018) - [c10]Meng Li, Veerle Derudder, Claude Desset, Andy Dewilde, André Bourdoux, Yanxiang Huang:
A 100 Gbps LDPC Decoder for the IEEE 802.11ay Standard. ISTC 2018: 1-5 - 2017
- [c9]Sara Gunnarsson, Micaela Bortas, Yanxiang Huang, Cheng-Ming Chen, Liesbet Van der Perre
Lousy processing increases energy efficiency in massive MIMO systems. EuCNC 2017: 1-5 - [c8]Yanxiang Huang, Claude Desset, André Bourdoux, Wim Dehaene, Liesbet Van der Perre
Massive MIMO processing at the semiconductor edge: Exploiting the system and circuit margins for power savings. ICASSP 2017: 3474-3478 - [i1]Yanxiang Huang:
Cross-Layer Optimization for Power-Efficient and Robust Digital Circuits and Systems. CoRR abs/1712.03948 (2017) - 2016
- [j3]Yanxiang Huang, Meng Li, Chunshu Li, Peter Debacker, Liesbet Van der Perre
Computation-skip Error Mitigation Scheme for Power Supply Voltage Scaling in Recursive Applications. J. Signal Process. Syst. 84(3): 413-424 (2016) - [c7]Yanxiang Huang, Chunshu Li, Khaled Khalaf, André Bourdoux, Julien Verschueren, Qixian Shi, Piet Wambacq, Sofie Pollin
A 28 nm CMOS 7.04 Gsps polar digital front-end processor for 60 GHz transmitter. A-SSCC 2016: 333-336 - [c6]Yanxiang Huang, Bin Cui
Real-time Video Recommendation Exploration. SIGMOD Conference 2016: 35-46 - 2015
- [j2]Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez:
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers. Microprocess. Microsystems 39(8): 869-878 (2015) - [j1]Yanxiang Huang, Lele Yu, Xiang Wang, Bin Cui
A multi-source integration framework for user occupation inference in social media systems. World Wide Web 18(5): 1247-1267 (2015) - [c5]Meng Li, Jan-Willem Weijers, Veerle Derudder, Ilse Vos, Maxim Rykunov, Steven Dupont, Peter Debacker, Andy Dewilde, Yanxiang Huang, Liesbet Van der Perre
An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS. A-SSCC 2015: 1-5 - [c4]Chunshu Li, André Bourdoux, Marian Verhelst
<30 mW rectangular-to-polar conversion processor in 802.11ad polar transmitter. ICASSP 2015: 1022-1026 - [c3]Yanxiang Huang, Bin Cui
TencentRec: Real-time Stream Recommendation in Practice. SIGMOD Conference 2015: 227-238 - 2014
- [c2]Yanxiang Huang, Meng Li, Chunshu Li, Peter Debacker, Liesbet Van der Perre
Computation-skip error resilient scheme for recursive CORDIC. SiPS 2014: 50-55 - 2013
- [c1]Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez:
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers. NORCHIP 2013: 1-4
Coauthor Index
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