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Vinod Kumar Agrawal
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2010 – 2019
- 2018
- [j8]A. N. Nagamani, Chirag Ramesh
, Vinod Kumar Agrawal:
Design of Optimized Reversible Squaring and Sum-of-Squares Units. Circuits Syst. Signal Process. 37(4): 1753-1776 (2018) - [j7]H. V. Jayashree, Sharan Patil, Vinod Kumar Agrawal:
Design Approaches for Resource and Performance Optimization of Reversible BCD Addition and Unified BCD Addition/Subtraction Circuits. J. Circuits Syst. Comput. 27(3): 1850048:1-1850048:28 (2018) - [j6]A. N. Nagamani
A Genetic Algorithm-Based Heuristic Method for Test Set Generation in Reversible Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(2): 324-336 (2018) - [c5]A. N. Nagamani, Vijetha Ravichander, Madhumita Harish, Vinod Kumar Agrawal:
DFT methodologies for testing k-CNOT, Fredkin and Peres based reversible circuits. RAIT 2018: 1-6 - 2017
- [j5]H. V. Jayashree, Skanda Kotethota, Vinod Kumar Agrawal:
Reversible circuit design for GCD computation in cryptography algorithms. Int. J. Circuit Theory Appl. 45(2): 242-259 (2017) - [j4]H. V. Jayashree, Himanshu Thapliyal
Efficient Circuit Design of Reversible Square. Trans. Comput. Sci. 29: 33-46 (2017) - [c4]Mridula J. Deshpande, H. V. Jayashree, Vinod Kumar Agrawal:
Reversible circuit optimization using modified toffoli templates. ICACCI 2017: 344-349 - 2016
- [j3]A. N. Nagamani, S. Ashwin, B. Abhishek, Vinod Kumar Agrawal:
An Exact approach for Complete Test Set Generation of Toffoli-Fredkin-Peres based Reversible Circuits. J. Electron. Test. 32(2): 175-196 (2016) - [j2]A. N. Nagamani, S. Ashwin, B. Abhishek, K. V. Arjun, Vinod Kumar Agrawal:
Design and Analysis of Multiple Parameters Optimized n-Bit Reversible Magnitude Comparators. J. Circuits Syst. Comput. 25(9): 1650112:1-1650112:21 (2016) - [j1]H. V. Jayashree, Himanshu Thapliyal
Ancilla-input and garbage-output optimized design of a reversible quantum integer multiplier. J. Supercomput. 72(4): 1477-1493 (2016) - [c3]A. N. Nagamani, R. Nikhil, Manish Nagaraj, Vinod Kumar Agrawal:
Reversible Radix-4 booth multiplier for DSP applications. SPCOM 2016: 1-5 - [i1]H. V. Jayashree, Himanshu Thapliyal, Hamid R. Arabnia, Vinod Kumar Agrawal:
Ancilla-Input and Garbage-Output Optimized Design of a Reversible Quantum Integer Multiplier. CoRR abs/1608.01228 (2016) - 2015
- [c2]A. N. Nagamani, H. Vishnu Prasad, Rajendra S. Hathwar, Vinod Kumar Agrawal:
Design of optimized reversible multiplier for high speed DSP application. ICICS 2015: 1-5 - 2014
- [c1]H. V. Jayashree, Himanshu Thapliyal
Design of Dedicated Reversible Quantum Circuitry for Square Computation. VLSID 2014: 551-556
Coauthor Index
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