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Edward P. Hsieh
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1990 – 1999
- 1996
- [j5]Edward P. Hsieh, Michael D. O'Neill:
Preface. IBM J. Res. Dev. 40(4): 376 (1996) - [j4]John Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit DasGupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang:
Design planning for high-performance ASICs. IBM J. Res. Dev. 40(4): 431-452 (1996)
1970 – 1979
- 1973
- [j3]Willard G. Bouricius, William C. Carter, Edward P. Hsieh, Donald C. Jessep Jr., Aspi B. Wadia:
Modeling of a Bubble-Memory Organization with Self-Checking Translators to Achieve High Reliability. IEEE Trans. Computers 22(3): 269-275 (1973) - 1971
- [j2]Edward P. Hsieh:
Checking Experiments ror Sequential Machines. IEEE Trans. Computers 20(10): 1152-1166 (1971) - [j1]Willard G. Bouricius, Edward P. Hsieh, Gianfranco R. Putzolu, J. Paul Roth, Peter R. Schneider, Chung-Jen Tan:
Algorithms for Detection of Faults in Logic Circuits. IEEE Trans. Computers 20(11): 1258-1264 (1971)
1960 – 1969
- 1968
- [c1]Edward P. Hsieh, Chung-Jen Tan, Monroe M. Newborn:
Uniform modular realization of sequential machines. ACM National Conference 1968: 613-621
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