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Kristof Blutman
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2010 – 2019
- 2017
- [j2]Kristof Blutman
, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, Kofi A. A. Makinwa, José Pineda de Gyvez:
A Low-Power Microcontroller in a 40-nm CMOS Using Charge Recycling. IEEE J. Solid State Circuits 52(4): 950-960 (2017) - [j1]Kristof Blutman, Hamed Fatemi, Ajay Kapoor, Andrew B. Kahng, Jiajia Li
Logic Design Partitioning for Stacked Power Domains. IEEE Trans. Very Large Scale Integr. Syst. 25(11): 3045-3056 (2017) - [c5]Kristof Blutman, Hamed Fatemi, Andrew B. Kahng, Ajay Kapoor, Jiajia Li, José Pineda de Gyvez:
Floorplan and placement methodology for improved energy reduction in stacked power-domain design. ASP-DAC 2017: 444-449 - 2016
- [c4]Kristof Blutman, Ajay Kapoor, Jacinto Garcia Martinez, Hamed Fatemi, José Pineda de Gyvez:
Lower power by voltage stacking: a fine-grained system design approach. DAC 2016: 78:1-78:5 - [c3]Kristof Blutman, Ajay Kapoor, Arjun Majumdar, Jacinto Garcia Martinez, Juan Diego Echeverri, Leo Sevat, Arnoud P. van der Wel, Hamed Fatemi, José Pineda de Gyvez, Kofi A. A. Makinwa:
A microcontroller with 96% power-conversion efficiency using stacked voltage domains. VLSI Circuits 2016: 1-2 - 2014
- [c2]Kristof Blutman, Jan A. Angevare, Amir Zjajo, Nick van der Meijs:
A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS. ISCAS 2014: 85-88 - 2013
- [c1]Jan A. Angevare, Kristof Blutman, Amir Zjajo, Nick van der Meijs:
A CMOS 0.23pj Freeze Vernier Time-To-Digital Converter. NORCHIP 2013: 1-4
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