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Anastasios Psarras
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2020 – today
- 2024
- [c11]Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou:
11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. ISSCC 2024: 212-214 - 2022
- [c10]Giorgos Dimitrakopoulos, Anastasios Psarras, Chrysostomos Nicopoulos
:
Virtual-Channel Flow Control Across Mesochronous Clock Domains. MOCAST 2022: 1-4 - 2020
- [j7]Dimitrios Konstantinou, Anastasios Psarras
The Mesochronous Dual-Clock FIFO Buffer. IEEE Trans. Very Large Scale Integr. Syst. 28(1): 302-306 (2020)
2010 – 2019
- 2018
- [c9]Dimitris Konstantinou, Anastasios Psarras
Low-power dual-edge-triggered synchronous latency-insensitive systems. MOCAST 2018: 1-4 - 2017
- [j6]Emmanuel Karampasis, Nick P. Papanikolaou
Active Thermoelectric Cooling Solutions for Airspace Applications: the THERMICOOL Project. IEEE Access 5: 2288-2299 (2017) - [j5]Anastasios Psarras
A Dual-Clock Multiple-Queue Shared Buffer. IEEE Trans. Computers 66(10): 1809-1815 (2017) - [j4]Anastasios Psarras
Networks-on-Chip With Double-Data-Rate Links. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(12): 3103-3114 (2017) - 2016
- [j3]Anastasios Psarras
ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing. IEEE Trans. Computers 65(10): 3136-3147 (2016) - [j2]Anastasios Psarras
PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 844-857 (2016) - [c8]Michalis Paschou, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
CrossOver: Clock domain crossing under virtual-channel flow control. DATE 2016: 1183-1188 - [c7]Anastasios Psarras
A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors. ACM Great Lakes Symposium on VLSI 2016: 335-340 - [c6]Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos
RapidLink: A network-on-chip architecture with double-data-rate links. ICECS 2016: 93-96 - 2015
- [j1]Ioannis Seitanidis, Anastasios Psarras
ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3015-3028 (2015) - [c5]Anastasios Psarras, I. Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos:
PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation. DATE 2015: 1090-1095 - [c4]Alexandros Panteloukas, Anastasios Psarras
Timing-resilient Network-on-Chip architectures. IOLTS 2015: 77-82 - 2014
- [c3]Giorgos Dimitrakopoulos, I. Seitanidis, Anastasios Psarras, K. Tsiouris, Pavlos M. Mattheakis, Jordi Cortadella:
Hardware primitives for the synthesis of multithreaded elastic systems. DATE 2014: 1-4 - [c2]I. Seitanidis, Anastasios Psarras, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos:
ElastiStore: An elastic buffer architecture for Network-on-Chip routers. DATE 2014: 1-6 - [c1]I. Seitanidis, Anastasios Psarras
ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture. NOCS 2014: 135-142
Coauthor Index
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