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Atsushi Miyanishi
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2010 – 2019
- 2014
- [c2]Yoshisato Yokoyama, Yuichiro Ishii, Koji Tanaka, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi, Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba, Koji Nii:
40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues. A-SSCC 2014: 25-28 - [c1]Yoshisato Yokoyama, Yuichiro Ishii, Hidemitsu Kojima, Atsushi Miyanishi, Yoshiki Tsujihashi, Shinobu Asayama, Kazutoshi Shiba, Koji Tanaka, Tatsuya Fukuda, Koji Nii, Kazumasa Yanagisawa:
40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU. ISQED 2014: 24-31
1990 – 1999
- 1999
- [j2]Akira Yamazaki, Tadato Yamagata, Makoto Hatakenaka, Atsushi Miyanishi, Isao Hayashi, Shigeki Tomishima
, Atsuo Mangyo, Yoshio Yukinari, Takashi Tatsumi, Masashi Matsumura, Kazutami Arimoto, Michihiro Yamada:
A 5.3-GB/s embedded SDRAM core with slight-boost scheme. IEEE J. Solid State Circuits 34(5): 661-669 (1999) - 1994
- [j1]Yoshiki Tsujihashi, Hisashi Matsumoto, Hidekatsu Nishimaki, Atsushi Miyanishi, Hiroomi Nakao, Osamu Kitada, Shuhei Iwade, Shinpei Kayano, Masayoshi Sakao:
A high-density data-path generator with stretchable cells. IEEE J. Solid State Circuits 29(1): 2-8 (1994)
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last updated on 2024-04-25 05:48 CEST by the dblp team
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