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Carlos Tadeo Ortega Otero
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2010 – 2019
- 2015
- [c8]Robert Karmazin, Stephen Longfield Jr., Carlos Tadeo Ortega Otero, Rajit Manohar:
Timing Driven Placement for Quasi Delay-Insensitive Circuits. ASYNC 2015: 45-52 - [c7]Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar:
AES Hardware-Software Co-design in WSN. ASYNC 2015: 85-92 - [c6]Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, Rajit Manohar:
Automatic obfuscated cell layout for trusted split-foundry design. HOST 2015: 56-61 - 2014
- [c5]Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, Rajit Manohar:
ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes. ISQED 2014: 667-674 - 2013
- [c4]Robert Karmazin, Carlos Tadeo Ortega Otero, Rajit Manohar:
cellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells. ASYNC 2013: 58-66 - [c3]Benjamin Hill, Robert Karmazin, Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar:
A split-foundry asynchronous FPGA. CICC 2013: 1-4 - 2012
- [j1]Shivam Priyadarshi, T. Robert Harris, Samson Melamed
, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis
Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. IET Circuits Devices Syst. 6(1): 35-44 (2012) - 2010
- [c2]Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar:
Static Power Reduction Techniques for Asynchronous Circuits. ASYNC 2010: 52-61
2000 – 2009
- 2008
- [c1]Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra J. Jackson, Rajit Manohar:
Variability in 3-D integrated circuits. CICC 2008: 659-662
Coauthor Index
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