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Chengmo Yang
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2020 – today
- 2024
- [c70]Jhon Ordoñez, Chengmo Yang:
Derailed: Arbitrarily Controlling DNN Outputs with Targeted Fault Injection Attacks. DATE 2024: 1-6 - 2023
- [c69]Tommy White, Charles Gouert, Chengmo Yang, Nektarios Georgios Tsoutsos:
FHE-Booster: Accelerating Fully Homomorphic Execution with Fine-tuned Bootstrapping Scheduling. HOST 2023: 293-303 - [c68]Qi Liu, Jieming Yin, Wujie Wen, Chengmo Yang, Shi Sha:
NeuroPots: Realtime Proactive Defense against Bit-Flip Attacks in Neural Networks. USENIX Security Symposium 2023: 6347-6364 - 2022
- [c67]Fanruo Meng, Chengmo Yang:
Exploring Image Selection for Self-Testing in Neural Network Accelerators. ISVLSI 2022: 345-350 - [p1]Chen Liu, Chengmo Yang:
Defense Against Hardware Trojan Collusion in MPSoCs. Behavioral Synthesis for Hardware Security 2022: 233-264 - 2021
- [j25]Weihua Liu
, Fei Wu
DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(1): 66-77 (2021) - [j24]Fateme S. Hosseini
A Compile-Time Framework for Tolerating Read Disturbance in STT-RAM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1545-1558 (2021) - [j23]Fateme S. Hosseini, Fanruo Meng, Chengmo Yang, Wujie Wen, Rosario Cammarota:
Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation. ACM Trans. Embed. Comput. Syst. 20(5s): 85:1-85:21 (2021) - [c66]Fanruo Meng, Fateme S. Hosseini, Chengmo Yang:
A Self-Test Framework for Detecting Fault-induced Accuracy Drop in Neural Network Accelerators. ASP-DAC 2021: 722-727 - [c65]Weihua Liu, Fei Wu, Jian Zhou, Meng Zhang, Chengmo Yang, Zhonghai Lu, Yu Wang, Changsheng Xie:
Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory. DATE 2021: 1729-1732 - [c64]Fateme S. Hosseini, Qi Liu, Fanruo Meng, Chengmo Yang, Wujie Wen:
Safeguarding the Intelligence of Neural Networks with Built-in Light-weight Integrity MArks (LIMA). HOST 2021: 1-12 - [c63]Patrick Cronin, Xing Gao, Chengmo Yang, Haining Wang:
Charger-Surfing: Exploiting a Power Line Side-Channel for Smartphone Information Leakage. USENIX Security Symposium 2021: 681-698 - [e1]Jason Xue, Chengmo Yang:
CODES/ISSS 2021, International Conference on Hardware/Software Codesign and System Synthesis, Virtual Event, October 10-13, 2021. ACM 2021, ISBN 978-1-4503-9076-7 [contents] - 2020
- [j22]Xinyi Zhang, Clay Patterson, Yongpan Liu, Chengmo Yang, Chun Jason Xue, Jingtong Hu
Low Overhead Online Data Flow Tracking for Intermittently Powered Non-Volatile FPGAs. ACM J. Emerg. Technol. Comput. Syst. 16(3): 26:1-26:20 (2020) - [j21]Chen Liu
Securing Cyber-Physical Systems from Hardware Trojan Collusion. IEEE Trans. Emerg. Top. Comput. 8(3): 655-667 (2020) - [c62]Qi Liu, Tao Liu, Zihao Liu, Wujie Wen, Chengmo Yang:
Monitoring the Health of Emerging Neural Network Accelerators with Cost-effective Concurrent Test. DAC 2020: 1-6 - [c61]Chengmo Yang, Patrick Cronin, Agamyrat Agambayev, Sule Ozev, A. Enis Çetin, Alex Orailoglu:
A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration. ICCAD 2020: 8:1-8:9 - [i3]Xinyi Zhang, Clay Patterson, Yongpan Liu, Chengmo Yang, Chun Jason Xue, Jingtong Hu:
Low Overhead Online Data Flow Tracking for Intermittently Powered Non-volatile FPGAs. CoRR abs/2002.02094 (2020) - [i2]Rosario Cammarota, Matthias Schunter, Anand Rajan, Fabian Boemer, Ágnes Kiss, Amos Treiber, Christian Weinert, Thomas Schneider, Emmanuel Stapf, Ahmad-Reza Sadeghi, Daniel Demmler
Trustworthy AI Inference Systems: An Industry Research View. CoRR abs/2008.04449 (2020)
2010 – 2019
- 2019
- [j20]Diaa Badawi
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. IEEE Access 7: 155701-155710 (2019) - [j19]Jinshan Yue
A 3.77TOPS/W Convolutional Neural Network Processor With Priority-Driven Kernel Optimization. IEEE Trans. Circuits Syst. II Express Briefs 66-II(2): 277-281 (2019) - [c60]Tao Liu, Wujie Wen, Lei Jiang, Yanzhi Wang, Chengmo Yang, Gang Quan
A Fault-Tolerant Neural Network Architecture. DAC 2019: 55 - [c59]Shunzhuo Wang, Fei Wu, Chengmo Yang, Jiaona Zhou, Changsheng Xie, Jiguang Wan:
WAS: Wear Aware Superblock Management for Prolonging SSD Lifetime. DAC 2019: 213 - [c58]Fateme S. Hosseini, Chengmo Yang:
Compiler-Directed and Architecture-Independent Mitigation of Read Disturbance Errors in STT-RAM. DATE 2019: 222-227 - [c57]Chengmo Yang, Yuan Xue:
A Scalable and Process Variation Aware NVM-FPGA Placement Algorithm. ACM Great Lakes Symposium on VLSI 2019: 165-170 - [c56]Chengmo Yang, Zeyu Chen:
A Processing-In-Memory Implementation of SHA-3 Using a Voltage-Gated Spin Hall-Effect Driven MTJ-based Crossbar. ACM Great Lakes Symposium on VLSI 2019: 195-200 - [c55]Hoda Aghaei Khouzani, Chengmo Yang:
Tuning Track-based NVM Caches for Low-Power IoT Devices. ACM Great Lakes Symposium on VLSI 2019: 513-518 - [c54]Patrick Cronin, Chengmo Yang:
A Fetching Tale: Covert Communication with the Hardware Prefetcher. HOST 2019: 101-110 - [c53]Diaa Badawi, Sule Ozev, Jennifer Blain Christen, Chengmo Yang, Alex Orailoglu, A. Enis Çetin:
Detecting Gas Vapor Leaks through Uncalibrated Sensor Based CPS. ICASSP 2019: 8296-8300 - [c52]Patrick Cronin, Charles Gouert, Dimitris Mouris
Covert Data Exfiltration Using Light and Power Channels. ICCD 2019: 301-304 - [c51]Fateme S. Hosseini, Chengmo Yang:
Comprehensive Evaluation of Program Reliability with ComFIDet: An Integrated Fault Injection and Detection Framework for Embedded Systems. ICESS 2019: 1-8 - [i1]Diaa Badawi, Tuba Ayhan, Sule Ozev, Chengmo Yang, Alex Orailoglu, A. Enis Çetin:
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. CoRR abs/1908.07619 (2019) - 2018
- [j18]Patrick Cronin
A Low Overhead Solution to Resilient Assembly Lines Built From Legacy Controllers. IEEE Embed. Syst. Lett. 10(3): 103-106 (2018) - [j17]Fanruo Meng
Power- and Endurance-Aware Neural Network Training in NVM-Based Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2709-2719 (2018) - [j16]Laura Rozo
Reliability-Aware Runtime Adaption Through a Statically Generated Task Schedule. IEEE Trans. Very Large Scale Integr. Syst. 26(1): 11-22 (2018) - [c50]Hongbin Zhang, Chao Zhang, Qingda Hu, Chengmo Yang, Jiwu Shu:
Performance analysis on structure of racetrack memory. ASP-DAC 2018: 367-374 - [c49]Fei Wu, Jiaona Zhou, Shunzhuo Wang, Yajuan Du, Chengmo Yang, Changsheng Xie:
FastGC: accelerate garbage collection via an efficient copyback-based data migration in SSDs. DAC 2018: 7:1-7:6 - [c48]Patrick Cronin, Chengmo Yang, Yongpan Liu:
A collaborative defense against wear out attacks in non-volatile processors. DAC 2018: 88:1-88:6 - [c47]Patrick Cronin, Chengmo Yang:
Lowering the barrier to online malware detection through low frequency sampling of HPCs. HOST 2018: 177-180 - [c46]Hoda Aghaei Khouzani, Chen Liu, Chengmo Yang:
Architecting data placement in SSDs for efficient secure deletion implementation. ICCAD 2018: 42 - [c45]Patrick Cronin, Chengmo Yang, Yongpan Liu:
Reliability and Security in Non-volatile Processors, Two Sides of the Same Coin. ISVLSI 2018: 112-117 - [c44]Xinyi Zhang, Clay Patterson, Yongpan Liu, Chengmo Yang, Chun Jason Xue, Jingtong Hu:
Low Overhead Online Checkpoint for Intermittently Powered Non-volatile FPGAs. ISVLSI 2018: 238-244 - 2017
- [j15]Yuan Xue, Chengmo Yang:
Path reuse-aware routing for non-volatile memory based FPGAs. Integr. 58: 505-517 (2017) - [j14]Chen Liu, Hoda Aghaei Khouzani
ErasuCrypto: A Light-weight Secure Data Deletion Scheme for Solid State Drives. Proc. Priv. Enhancing Technol. 2017(1): 132-148 (2017) - [j13]Mengying Zhao, Yuan Xue, Jingtong Hu
State Asymmetry Driven State Remapping in Phase Change Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(1): 27-40 (2017) - [j12]Hoda Aghaei Khouzani
Segment and Conflict Aware Page Allocation and Migration in DRAM-PCM Hybrid Main Memory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1458-1470 (2017) - [j11]Chen Pan, Mimi Xie, Chengmo Yang, Yiran Chen, Jingtong Hu
Exploiting Multiple Write Modes of Nonvolatile Main Memory in Embedded Systems. ACM Trans. Embed. Comput. Syst. 16(4): 110:1-110:26 (2017) - [j10]Hoda Aghaei Khouzani
A DWM-Based Stack Architecture Implementation for Energy Harvesting Systems. ACM Trans. Embed. Comput. Syst. 16(5s): 155:1-155:18 (2017) - [j9]Yuanhui Ni
State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers. VLSI Design 2017: 1030249:1-1030249:9 (2017) - [c43]Patrick Cronin, Chengmo Yang, Dongqin Zhou, Keni Qiu, Xin Shi, Yongpan Liu:
'The danger of sleeping', an exploration of security in non-volatile processors. AsianHOST 2017: 121-126 - [c42]Yuan Xue, Chengmo Yang, Jingtong Hu
Age-aware Logic and Memory Co-Placement for RRAM-FPGAs. DAC 2017: 1:1-1:6 - [c41]Fateme S. Hosseini, Pouya Fotouhi
Leveraging Compiler Optimizations to Reduce Runtime Fault Recovery Overhead. DAC 2017: 20:1-20:6 - [c40]Hoda Aghaei Khouzani
Leveraging access port positions to accelerate page table walk in DWM-based main memory. DATE 2017: 1450-1455 - [c39]Meng Zhang, Fei Wu, Yajuan Du, Chengmo Yang, Changsheng Xie, Jiguang Wan:
CooECC: A Cooperative Error Correction Scheme to Reduce LDPC Decoding Latency in NAND Flash. ICCD 2017: 657-664 - [c38]Qiao Li
Improving read performance via selective Vpass reduction on high density 3D NAND flash memory. NVMSA 2017: 1-4 - [c37]Yuan Xue, Abraham Mcllvaine, Chengmo Yang:
Power-aware and cost-efficient state encoding in non-volatile memory based FPGAs. VLSI-SoC 2017: 1-6 - 2016
- [j8]Hoda Aghaei Khouzani
Fully Exploiting PCM Write Capacity Within Near Zero Cost Through Segment-Based Page Allocation. ACM J. Emerg. Technol. Comput. Syst. 12(4): 31:1-31:26 (2016) - [c36]Chen Liu, Patrick Cronin, Chengmo Yang:
A mutual auditing framework to protect IoT against hardware Trojans. ASP-DAC 2016: 69-74 - [c35]Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu
Routing path reuse maximization for efficient NV-FPGA reconfiguration. ASP-DAC 2016: 360-365 - [c34]Hoda Aghaei Khouzani
Towards a Scalable and Write-Free Multi-version Checkpointing Scheme in Solid State Drives. DSN 2016: 37-48 - 2015
- [c33]Mimi Xie, Chen Pan, Jingtong Hu
Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units. ASP-DAC 2015: 316-321 - [c32]Mengying Zhao, Yuan Xue, Chengmo Yang, Chun Jason Xue
Minimizing MLC PCM write energy for free through profiling-based state remapping. ASP-DAC 2015: 502-507 - [c31]Hoda Aghaei Khouzani
Improving performance and lifetime of DRAM-PCM hybrid main memory through a proactive page allocation strategy. ASP-DAC 2015: 508-513 - [c30]Laura A. Rozo Duque, Chengmo Yang:
Guiding fault-driven adaption in multicore systems through a reliability-aware static task schedule. ASP-DAC 2015: 612-617 - [c29]Laura A. Rozo Duque, Jose Manuel Monsalve Diaz, Chengmo Yang:
Improving MPSoC reliability through adapting runtime task schedule based on time-correlated fault behavior. DATE 2015: 818-823 - [c28]Chen Pan, Mimi Xie, Chengmo Yang, Zili Shao
Nonvolatile main memory aware garbage collection in high-level language virtual machine. EMSOFT 2015: 197-206 - [c27]Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu
Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs. FPL 2015: 1-8 - [c26]Chen Liu, Chengmo Yang:
Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory. LCTES 2015: 12:1-12:10 - [c25]Chengmo Yang, Maria Ruiz Varela:
Qualifying non-volatile register files for embedded systems through compiler-directed write minimization and balancing. VLSI-SoC 2015: 86-91 - [c24]Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu
Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles. VLSI-SoC 2015: 92-97 - 2014
- [j7]Chen Liu, Jeyavijayan Rajendran, Chengmo Yang, Ramesh Karri
Shielding Heterogeneous MPSoCs From Untrustworthy 3PIPs Through Security- Driven Task Scheduling. IEEE Trans. Emerg. Top. Comput. 2(4): 461-472 (2014) - [j6]Liang Shi, Jianhua Li, Qing'an Li
A Unified Write Buffer Cache Management Scheme for Flash Memory. IEEE Trans. Very Large Scale Integr. Syst. 22(12): 2779-2792 (2014) - [c23]Chen Liu, Chengmo Yang, Yuanqi Shen:
Leveraging microarchitectural side channel information to efficiently enhance program control flow integrity. CODES+ISSS 2014: 5:1-5:9 - [c22]Chen Pan, Mimi Xie, Jingtong Hu
3M-PCM: Exploiting multiple write modes MLC phase change main memory in embedded systems. CODES+ISSS 2014: 33:1-33:10 - [c21]Chen Liu, Chengmo Yang:
Exploiting heterogeneity in MPSoCs to prevent potential trojan propagation across malicious IPs. ACM Great Lakes Symposium on VLSI 2014: 335-340 - [c20]Mengying Zhao, Liang Shi, Chengmo Yang, Chun Jason Xue
Leveling to the last mile: Near-zero-cost bit level wear leveling for PCM-based main memory. ICCD 2014: 16-21 - [c19]Chen Liu, Chengmo Yang:
Improving multilevel PCM reliability through age-aware reading and writing strategies. ICCD 2014: 264-269 - [c18]Hoda Aghaei Khouzani
Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocation. ISLPED 2014: 327-330 - 2013
- [c17]Hao Chen, Chengmo Yang:
Fault detection and recovery efficiency co-optimization through compile-time analysis and runtime adaptation. CASES 2013: 22:1-22:10 - [c16]Chen Liu, Jeyavijayan Rajendran, Chengmo Yang, Ramesh Karri
Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling. DFTS 2013: 101-106 - [c15]Hao Chen, Chengmo Yang:
Boosting efficiency of fault detection and recovery throughapplication-specific comparison and checkpointing. LCTES 2013: 13-20 - 2012
- [j5]Chengmo Yang, Alex Orailoglu:
Tackling Resource Variations Through Adaptive Multicore Execution Frameworks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(1): 132-145 (2012) - [c14]Tianzheng Wang, Duo Liu, Zili Shao
Write-activity-aware page table management for PCM-based embedded systems. ASP-DAC 2012: 317-322 - 2011
- [j4]Wenjing Rao, Chengmo Yang, Ramesh Karri
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. Computer 44(2): 46-53 (2011) - [j3]Yuping Zhang, Chun Jason Xue
Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability. J. Parallel Distributed Comput. 71(10): 1400-1410 (2011) - [j2]Chengmo Yang, Alex Orailoglu:
Full Fault Resilience and Relaxed Synchronization Requirements at the Cache-Memory Interface. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 1996-2009 (2011) - [c13]Chengmo Yang, Alex Orailoglu:
Frugal but flexible multicore topologies in support of resource variation-driven adaptivity. DATE 2011: 1255-1260 - [c12]Liang Shi, Jianhua Li, Chun Jason Xue
ExLRU: a unified write buffer cache management for flash memory. EMSOFT 2011: 339-348 - [c11]Jianhua Li, Liang Shi, Chun Jason Xue
Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache. ESTIMedia 2011: 19-28 - 2010
- [b1]Chengmo Yang:
Tackling computation uncertainty through fine-grained and predictable execution adaptivity in multicore systems. University of California, San Diego, USA, 2010 - [j1]Chengmo Yang, Mingjing Chen, Alex Orailoglu:
Squashing code size in microcoded IPs while delivering high decompression speed. Des. Autom. Embed. Syst. 14(3): 265-284 (2010) - [c10]Chengmo Yang, Alex Orailoglu:
Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations. VLSI-SoC 2010: 396-401 - [c9]Chengmo Yang, Chun Jason Xue
Fine-grained adaptive CMP cache sharing through access history exploitation. VLSI-SoC 2010: 420-425
2000 – 2009
- 2009
- [c8]Chengmo Yang, Mingjing Chen, Alex Orailoglu:
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses. CODES+ISSS 2009: 249-256 - [c7]Chengmo Yang, Alex Orailoglu:
Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude. DATE 2009: 63-68 - [c6]Chengmo Yang, Alex Orailoglu:
Processor reliability enhancement through compiler-directed register file peak temperature reduction. DSN 2009: 468-477 - 2008
- [c5]Chengmo Yang, Alex Orailoglu:
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. CASES 2008: 11-20 - 2007
- [c4]Chengmo Yang, Alex Orailoglu:
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs. CASES 2007: 150-154 - [c3]Chengmo Yang, Alex Orailoglu:
Predictable execution adaptivity through embedding dynamic reconfigurability into static MPSoC schedules. CODES+ISSS 2007: 15-20 - 2006
- [c2]Chengmo Yang, Alex Orailoglu:
Power-efficient instruction delivery through trace reuse. PACT 2006: 192-201 - [c1]Chengmo Yang, Alex Orailoglu:
Power efficient branch prediction through early identification of branch addresses. CASES 2006: 169-178
Coauthor Index
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last updated on 2024-11-22 19:44 CET by the dblp team
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