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Kei Hiraki
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2010 – 2019
- 2019
- [j7]Kenichi Koizumi
, Peter Eades, Kei Hiraki, Mary Inaba:
BJR-tree: fast skyline computation algorithm using dominance relation-based tree structure. Int. J. Data Sci. Anal. 7(1): 17-34 (2019) - 2018
- [c73]Kenichi Koizumi, Kei Hiraki, Mary Inaba:
Skyline Computation for Low-Latency Image-Activated Cell Identification. AAAI 2018: 8101-8102 - [c72]Kenichi Koizumi, Kei Hiraki, Mary Inaba:
Continuous Skyline Computation Accelerator with Parallelizing Dominance Relation Calculations: (Abstract Only). FPGA 2018: 285 - 2017
- [c71]Kenichi Koizumi, Peter Eades, Kei Hiraki, Mary Inaba:
BJR-Tree: Fast Skyline Computation Algorithm for Serendipitous Searching Problems. DSAA 2017: 272-282 - 2015
- [c70]Daichi Murakami, Kei Hiraki:
An Optimization of Resource Arrangement for Network-on-Chip using Genetic Algorithm. PACT 2015: 484-485 - [c69]Kenichi Koizumi, Mary Inaba, Kei Hiraki:
Efficient implementation of continuous skyline computation on a multi-core processor. MEMOCODE 2015: 52-55 - [c68]Hisanobu Tomari, Kei Hiraki:
Keeping old computers alive for deeper understanding of computer architecture. WCAE 2015: 5:1-5:7 - 2014
- [c67]Jun Ohno, Kei Hiraki:
Accelerating cache coherence mechanism with speculation. ICS 2014: 171 - [c66]Takahiro Naruko, Kei Hiraki:
FOLCS: A Lightweight Implementation of a Cycle-accurate NoC Simulator on FPGAs. MES@ISCA 2014: 25-32 - 2012
- [j6]Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga:
Using Cacheline Reuse Characteristics for Prefetcher Throttling. IEICE Trans. Inf. Syst. 95-D(12): 2928-2938 (2012) - [c65]Yasuo Ishii, Mary Inaba, Kei Hiraki:
Unified memory optimizing architecture: memory subsystem control with a unified predictor. ICS 2012: 267-278 - [c64]Hisanobu Tomari, Kei Hiraki:
Abstract: Impact of Integer Instructions in Floating Point Applications. SC Companion 2012: 1347-1348 - [c63]Hisanobu Tomari, Kei Hiraki:
Poster: The Impact of Integer Instructions in Floating Point Applications. SC Companion 2012: 1349 - 2011
- [j5]Yasuo Ishii, Mary Inaba, Kei Hiraki:
Access Map Pattern Matching for High Performance Data Cache Prefetch. J. Instr. Level Parallelism 13 (2011) - [c62]Hidetsugu Irie, Takefumi Miyoshi, Goki Honjo, Kei Hiraki, Tsutomu Yoshinaga:
CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection. ICNC 2011: 127-133 - [c61]Junichiro Makino
The performance of GRAPE-DR for dense matrix operations. ICCS 2011: 888-897 - [r1]Kei Hiraki:
SIGMA-1. Encyclopedia of Parallel Computing 2011: 1812-1819 - 2010
- [j4]Simon Portegies Zwart, Derek Groen
Simulating the Universe on an Intercontinental Grid. Computer 43(8): 63-70 (2010) - [c60]Hisanobu Tomari, Mary Inaba, Kei Hiraki:
Compressing Floating-Point Number Stream for Numerical Applications. ICNC 2010: 112-119 - [i1]Simon Portegies Zwart, Tomoaki Ishiyama, Derek Groen, Keigo Nitadori, Junichiro Makino, Cees de Laat, Stephen L. W. McMillan, Kei Hiraki, Stefan Harfst, Paola Grosso:
Simulating the universe on an intercontinental grid of supercomputers. CoRR abs/1001.0773 (2010)
2000 – 2009
- 2009
- [c59]Yasuo Ishii, Mary Inaba, Kei Hiraki:
Access map pattern matching for data cache prefetch. ICS 2009: 499-500 - [c58]Naoki Tanida, Mary Inaba, Kei Hiraki, Takeshi Yoshino:
Hardware Accelerator for Full-Text Search (HAFTS) with Succinct Data Structure. ReConFig 2009: 155-160 - [c57]Kenichi Koizumi, Mary Inaba, Kei Hiraki, Yasuo Ishii, Takefumi Miyoshi, Kazuki Yoshizoe:
Triple Line-Based Playout for Go - An Accelerator for Monte Carlo Go. ReConFig 2009: 161-166 - 2008
- [c56]Hiroshige Hayashizaki, Yutaka Sugawara, Mary Inaba, Kei Hiraki:
MCAMP: communication optimization on massively parallel machines with hierarchical scratch-pad memory. PACT 2008: 102-111 - [c55]Yasuhiro Ito, Yutaka Sugawara, Mary Inaba, Kei Hiraki:
CVC: The C to RTL compiler for callback-based verification model. FPL 2008: 499-502 - [c54]Yutaka Sugawara, Takeshi Yoshino, Hiroshi Tezuka, Mary Inaba, Kei Hiraki:
Effect of Packet Shuffler on Parallel TCP Stream Network. ICN 2008: 180-185 - [c53]Yutaka Sugawara, Takeshi Yoshino, Hiroshi Tezuka, Mary Inaba, Kei Hiraki:
Effect of Parallel TCP Stream Equalizer on Real Long Fat-pipe Network. NCA 2008: 279-282 - [c52]Takeshi Yoshino, Yutaka Sugawara, Katsushi Inagami, Junji Tamatsukuri
Performance optimization of TCP/IP over 10 gigabit ethernet by precise instrumentation. SC 2008: 11 - 2007
- [c51]Yutaka Sugawara, Mary Inaba, Kei Hiraki:
Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network. FGCN (1) 2007: 391-396 - [c50]Kei Hiraki:
GRAPE-DR Project: a combination of peta-scale computing and high-speed networking. FPT 2007 - [c49]Yousuke Nakamura, Kei Hiraki:
Heterogeneous Functional Units for High Speed Fault-Tolerant Execution Stage. PRDC 2007: 260-263 - [c48]Junichiro Makino
GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing. SC 2007: 18 - 2006
- [c47]Yuu Shibata, Kei Hiraki:
Applying recent techniques for retro games: in the case of undo function. Advances in Computer Entertainment Technology 2006: 21 - [c46]Mary Inaba, Kei Hiraki:
Network Processing Hardware. AINTEC 2006: 103-112 - 2005
- [c45]Rei Odaira, Kei Hiraki:
Sentinel PRE: Hoisting beyond Exception Dependency with Dynamic Deoptimization. CGO 2005: 328-338 - [c44]Yutaka Sugawara, Mary Inaba, Kei Hiraki:
High-speed and Memory Efficient TCP Stream Scanning using FPGA. FPL 2005: 45-50 - [c43]Shoichi Hirasawa, Kei Hiraki:
Software SMLP Execution with Side-Effect Slice Exclusion. PDPTA 2005: 832-840 - 2004
- [c42]Yutaka Sugawara, Mary Inaba, Kei Hiraki:
Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems. FPL 2004: 484-493 - [c41]Masamichi Takagi, Kei Hiraki:
Inter-reference gap distribution replacement: an improved replacement algorithm for set-associative caches. ICS 2004: 20-30 - [c40]Makoto Nakamura, Hiroyuki Kamezawa, Junji Tamatsukuri
Long Fat Pipe Congestion Control for Multi-Stream Data Transfer. ISPAN 2004: 294-299 - [c39]Rei Odaira, Kei Hiraki:
Partial Value Number Redundancy Elimination. LCPC 2004: 409-423 - [c38]Shoichi Hirasawa, Kei Hiraki:
Utilizing Dynamic Data Value Localities in Internal Variables. PDCAT 2004: 305-309 - [c37]Hiroyuki Kamezawa, Makoto Nakamura, Junji Tamatsukuri
Inter-Layer Coordination for Parallel TCP Streams on Long Fat Pipe Networks. SC 2004: 24 - [c36]Yutaka Sugawara, Kei Hiraki:
A computer architecture education curriculum through the design and implementation of original processors using FPGAs. WCAE 2004: 3 - 2003
- [c35]Masamichi Takagi, Kei Hiraki:
Compression in Data Caches with Compressible Field Isolation for Recursive Data Structures. Euro-Par 2003: 609-615 - [c34]Ray Odaira, Kei Hiraki:
Selective Optimization of Locks by Runtime Statistics and Just-in-Time Compilation. IPDPS 2003: 135 - [c33]Masamichi Takagi, Kei Hiraki:
Field Array Compression in Data Caches for Dynamically Allocated Recursive Data Structure. ISHPC 2003: 127-145 - 2002
- [c32]Kei Hiraki, Mary Inaba, Junji Tamatsukuri
Data Reservoir: A New Approach to Data-Intensive Scientific Computation. ISPAN 2002: 269-274 - [c31]Yousuke Nakamura, Kei Hiraki:
Highly Fault-Tolerant FPGA Processor by Degrading Strategy. PRDC 2002: 75-80 - [c30]Kei Hiraki, Mary Inaba, Junji Tamatsukuri, Ryutaro Kurusu, Yukichi Ikuta, Hisashi Koga, Akira Zinzaki:
Data Reservoir: utilization of multi-gigabit backbone network for data-intensive research. SC 2002: 18:1-18:9 - 2000
- [c29]Junpei Niwa, Takashi Matsumoto, Kei Hiraki:
Comparative study of page-based and segment-based software DSM through compiler optimization. ICS 2000: 284-295
1990 – 1999
- 1999
- [c28]Kiyofumi Tanaka, Takashi Matsumoto, Kei Hiraki:
Lightweight Hardware Distributed Shared Memory Supported by Generalized Combining. HPCA 1999: 90-99 - [c27]Kenji Morimoto, Takashi Matsumoto, Kei Hiraki:
Performance Evaluation of the MPI/MBCF with the NAS Parallel Benchmarks. PVM/MPI 1999: 19-26 - [c26]Shigero Sasaki, Takashi Matsumoto, Kei Hiraki:
On the Schedulability Conditions on Partial Time Slots . RTCSA 1999: 166-173 - 1998
- [c25]Tatsushi Inagaki, Junpei Niwa, Takashi Matsumoto, Kei Hiraki:
Supporting Software Distributed Shared Memory with an Optimizing Compiler. ICPP 1998: 225-236 - [c24]Takashi Matsumoto, Kei Hiraki:
MBCF: A Protected and Virtualized High-Speed User-Level Memory-Based Communication Facility. International Conference on Supercomputing 1998: 259-266 - [c23]Kei Hiraki, Junji Tamatsukuri
Speculative Execution Model with Duplication. International Conference on Supercomputing 1998: 321-328 - [c22]Kenji Morimoto, Takashi Matsumoto, Kei Hiraki:
Implementing MPI with the Memory-Based Communication Facilities on the SSS-CORE Operating System. PVM/MPI 1998: 223-230 - 1997
- [c21]Hironori Nakajo, Satoshi Ohtani, Takashi Matsumoto, Masadi Kohata, Kei Hiraki, Yukio Kaneda:
An I/O Network Architecture of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. International Conference on Supercomputing 1997: 253-260 - [c20]Yojiro Nobukuni, Takashi Matsumoto, Kei Hiraki:
Resource Management Methods for General Purpose Massively Parallel OS SSS-Core. ISHPC 1997: 255-266 - [c19]Junpei Niwa, Tatsushi Inagaki, Takashi Matsumoto, Kei Hiraki:
Efficient Implementation of Software Release Consistency on Asymmetric Distributed Shared Memory. ISPAN 1997: 198-201 - 1996
- [c18]Takashi Matsumoto, Tomohiro Kudoh, Katsunobu Nishimura, Kei Hiraki, Hidehiko Tanaka:
Distributed Shared Memory Architecture for JUMP-1: A General-Purpose MPP Prototype. ISPAN 1996: 131-137 - 1995
- [c17]Tomohiro Kudoh, Hideharu Amano, Takashi Matsumoto, Kei Hiraki, Yulu Yang, Katsunobu Nishimura, Koichi Yoshimura, Yasuhito Fukushima:
Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1. ICPP (1) 1995: 186-193 - [c16]Hironori Nakajo, Takashi Matsumoto, Masaki Kohata, Hideo Matsuda, Kei Hiraki, Yukio Kaneda:
High Performance I/O System of the Distributed Shared-Memory Massively Parallel Computer JUMP-1. Parallel and Distributed Computing and Systems 1995: 470-473 - 1994
- [c15]Kei Hiraki, Hideharu Amano, Morihiro Kuga, Toshinori Sueyoshi, Tomohiro Kudoh, Hiroshi Nakashima, Hironori Nakajo, Hideo Matsuda, Takashi Matsumoto, Shin-ichiro Mori:
Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations. ISPAN 1994: 427-434 - [c14]Satoshi Sekiguchi, Kei Hiraki:
Automatic Reduction Tree Generation for Fine-Grain Parallel Architectures when Iteration Count is Unknown. LCPC 1994: 487-496 - [p1]Kattamuri Ekanadham, Steve Gregor, Kei Hiraki, Robert A. Iannucci, Ragunathan Rajkumar:
An Architecture for Generalized Synchronization and Fast Switching. Multithreaded Computer Architecture 1994: 285-316 - 1993
- [c13]Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi:
Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor. International Conference on Supercomputing 1993: 220-229 - [c12]Takashi Matsumoto, Kei Hiraki:
Dynamic Switching of Coherent Cache Protocols and its Effects on Doacross Loops. International Conference on Supercomputing 1993: 328-337 - 1991
- [c11]Satoshi Sekiguchi, Toshio Shimada, Kei Hiraki:
Sequential description and parallel execution language DFCII dataflow supercomputers. ICS 1991: 57-66 - 1990
- [c10]Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai
Dataflow computer development in Japan. ICS 1990: 140-147
1980 – 1989
- 1989
- [j3]Toshio Shimada, Satoshi Sekiguchi, Kei Hiraki:
Data flow language DFC: Design and implementation. Syst. Comput. Jpn. 20(6): 1-10 (1989) - [c9]Yoshinori Yamaguchi, Shuichi Sakai, Kei Hiraki, Yuetsu Kodama:
An Architectural Disgn of a Highly Parallel Dataflow Machine. IFIP Congress 1989: 1155-1160 - [c8]Shuichi Sakai
An Architecture of a Dataflow Single Chip Processor. ISCA 1989: 46-53 - 1988
- [c7]Kei Hiraki, Satoshi Sekiguchi, Toshio Shimada:
Efficient vector processing on dataflow supercomputer SIGMA-1. SC 1988: 374-381 - 1987
- [j2]Kei Hiraki, Satoshi Sekiguchi, Toshio Shimada:
Load scheduling schemes using inter - PE network. Syst. Comput. Jpn. 18(1): 55-66 (1987) - [c6]Toshitsugu Yuba, Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi, Kenji Nishida:
The SIGMA-1 dataflow computer. FJCC 1987: 578-585 - 1986
- [c5]Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi, Toshio Shimada:
Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors. ICPP 1986: 584-591 - [c4]Toshio Shimada, Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi:
Evaluation of a Prototype Data Flow Processor of the SIGMA-1 for Scientific Computations. ISCA 1986: 226-234 - 1984
- [j1]Kei Hiraki, Kenji Nishida, Toshio Shimada:
Evaluation of Associative Memory Using Parallel Chained Hashing. IEEE Trans. Computers 33(9): 851-855 (1984) - [c3]Toshio Shimada, Kei Hiraki, Kenji Nishida:
An Architecture of a Data Flow Machine and Its Evaluation. COMPCON 1984: 486-490 - 1982
- [c2]Eiichi Goto, Takashi Soma, N. Inada, Tetsuo Ida, Masanori Idesawa, Kei Hiraki, M. Suzuki, Kentaro Shimizu, B. Philipov:
Design of a Lisp Machine - FLATS. Symposium on LISP and Functional Programming 1982: 208-215
1970 – 1979
- 1979
- [c1]Eiichi Goto, Tetsuo Ida, Kei Hiraki:
FLATS, a Machine for Numerical, Symbolic and Associative Computing. ISCA 1979: 102-110
Coauthor Index
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