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José E. Schutt-Ainé
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2020 – today
- 2023
- [j11]Tuomin Tao
, Da Li
A new pre-conditioned STDP rule and its hardware implementation in neuromorphic crossbar array. Neurocomputing 557: 126682 (2023) - [j10]Tuomin Tao
Modeling and Analysis of Spike Signal Sequence for Memristor Crossbar Array in Neuromorphic Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 70(6): 2271-2282 (2023) - 2021
- [j9]Wei Chun Chin
Thin-Film Transistor Simulations With the Voltage-In-Current Latency Insertion Method. IEEE Access 9: 159334-159348 (2021) - 2020
- [c5]Xinying Wang, Thong Nguyen, José E. Schutt-Ainé:
PAM-4 Behavioral Modeling using Machine Learning via Laguerre-Volterra Expansion. LASCAS 2020: 1-4
2010 – 2019
- 2019
- [j8]Da-Wei Wang
Fully Coupled Electrothermal Simulation of Large RRAM Arrays in the "Thermal-House". IEEE Access 7: 3897-3908 (2019) - [j7]Da-Wei Wang
An Improved Algorithm for Drift Diffusion Transport and Its Application on Large Scale Parallel Simulation of Resistive Random Access Memory Arrays. IEEE Access 7: 31273-31285 (2019) - [c4]José E. Schutt-Ainé, Patrick Goh
LIM Algorithms for MOSFET Models. LASCAS 2019: 33-36 - [i1]Thong Nguyen, Tianjian Lu, Ken Wu, José E. Schutt-Ainé:
Fast Transient Simulation of High-Speed Channels Using Recurrent Neural Network. CoRR abs/1902.02627 (2019) - 2018
- [j6]Da Wei
A 10-Gb/s/ch, 0.6-pJ/bit/mm Power Scalable Rapid-ON/OFF Transceiver for On-Chip Energy Proportional Interconnects. IEEE J. Solid State Circuits 53(3): 873-883 (2018) - 2013
- [c3]José E. Schutt-Ainé, Patrick Goh
Phase-locked loop simulations using the latency insertion method. LASCAS 2013: 1-4
2000 – 2009
- 2007
- [j5]Josh G. Nickel, José E. Schutt-Ainé:
Topological realizability conditions and their interpretation for admittance matrices of an MTL system with mode delays. J. Frankl. Inst. 344(6): 912-917 (2007) - 2001
- [j4]José E. Schutt-Ainé, Sung-Mo Kang:
Interconnections-addressing the next challenge of IC technology (part I: integration and packaging trends). Proc. IEEE 89(4): 423-425 (2001) - [j3]José E. Schutt-Ainé, Sung-Mo Kang:
Scanning the issue interconnections - addressing the next challenge of IC technology (part II: design, characterization, and modeling). Proc. IEEE 89(5): 583-585 (2001) - [j2]José E. Schutt-Ainé:
High-frequency characterization of twisted-pair cables. IEEE Trans. Commun. 49(4): 598-601 (2001)
1990 – 1999
- 1997
- [j1]Wendemagegnehu T. Beyene, José E. Schutt-Ainé:
Transient analysis of diode switching circuits using asymptotic waveform evaluation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(12): 1447-1453 (1997) - 1993
- [c2]Dimitri Kuznetsov, José E. Schutt-Ainé:
Difference Model Approach for the Transient Simulation of Transmission Lines. ISCAS 1993: 1547-1550 - [c1]José E. Schutt-Ainé, Kyung-soo Oh:
Modeling Interconnections with Nonlinear Discontinuities. ISCAS 1993: 2122-2124
1980 – 1989
- 1988
- [b1]José E. Schutt-Ainé:
Modeling and Simulation of High-Speed Digital Circuit Interconnections. University of Illinois Urbana-Champaign, USA, 1988
Coauthor Index
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