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Carlos A. López-Barrio
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2020 – today
- 2020
- [c11]Asghar Bahramali, Marisa López-Vallejo, Carlos A. López-Barrio:
An ultra-low power deep sub-micron fast start-up circuit with added line regulation. DCIS 2020: 1-5
2010 – 2019
- 2019
- [c10]Asghar Bahramali, Marisa López-Vallejo, Carlos A. López-Barrio:
A 365mV, 13nW CMOS-only energy harvested reference voltage for RFID applications in 40nm technology. DCIS 2019: 1-6 - 2018
- [c9]Daniel Fortun, Carlos Garcia de la Cueva, Jesús Grajal, Marisa López-Vallejo, Carlos A. López-Barrio:
Performance-oriented Implementation of Hilbert Filters on FPGAs. DCIS 2018: 1-6 - 2017
- [j4]Fernando García-Redondo, Pablo Royer, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero, Carlos A. López-Barrio:
Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1224-1235 (2017) - [c8]Fernando García-Redondo, Marisa López-Vallejo, Carlos A. López-Barrio:
Advanced integration of variability and degradation in RRAM SPICE compact models. SMACD 2017: 1-4 - 2013
- [j3]Pablo Ituero, Marisa López-Vallejo, Carlos A. López-Barrio:
A 0.0016 mm2 0.64 nJ Leakage-Based CMOS Temperature Sensor. Sensors 13(9): 12648-12662 (2013) - 2012
- [c7]Miguel Angel Sánchez, Marisa López-Vallejo, Carlos Angel Iglesias, Carlos A. López-Barrio:
Improving Hardware Reuse through XML-based Interface Encapsulation. ICECCS 2012: 49-56
2000 – 2009
- 2009
- [c6]José Manuel Moya, Javier Rodríguez Escolar, Julio Martín, Juan Carlos Vallejo, Pedro Malagón, Álvaro Araujo, Juan-Mariano de Goyeneche, Agustín Rubio, Elena Romero, Daniel Villanueva, Octavio Nieto-Taladriz, Carlos A. López-Barrio:
SORU: A Reconfigurable Vector Unit for Adaptable Embedded Systems. ARC 2009: 255-260 - [c5]Pedro Echeverría, Marisa López-Vallejo, Walter Bolognesi, Carlos A. López-Barrio:
Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs. ICECS 2009: 423-426 - 2008
- [j2]José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum:
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. Int. J. Embed. Syst. 3(4): 285-293 (2008) - 2007
- [i1]José Luis Ayala, Anya Apavatjrut, David Atienza, Marisa López-Vallejo, Carlos A. López-Barrio:
Thermal Characterization and Thermal Management in Processor-Based Systems. Power-aware Computing Systems 2007 - 2006
- [c4]Miguel A. Sánchez Marcos, Mario Garrido, Marisa López-Vallejo, Carlos A. López-Barrio:
Automated design space exploration of FPGA-based FFT architectures based on area and power estimation. FPT 2006: 127-134
1990 – 1999
- 1997
- [j1]Peter Marwedel, Carlos A. López-Barrio:
Guest Editor's Introduction: Design, Design Automation, and Test in Europe. IEEE Des. Test Comput. 14(2): 14-15 (1997) - 1993
- [c3]Maria José Aguado, Miguel Miranda, Eduardo de la Torre, Carlos A. López-Barrio:
A dynamic communication strategy for the distributed ATPG system DPLATON. EURO-DAC 1993: 271-276 - [c2]Maria José Aguado, Eduardo de la Torre, Miguel Miranda, Carlos A. López-Barrio:
Distributed Implementation of an ATPG System Using Dynamic Fault Allocation. ITC 1993: 409-418 - [c1]Miguel Miranda, Carlos A. López-Barrio:
Generation of Optimized Single Distributions of Weights for Random Built-in Self-Test. ITC 1993: 1023-1030
Coauthor Index
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