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Microelectronics Journal, Volume 113
Volume 113, July 2021
- Gaolei Zhou
, Xurui Mao, Wei Heng, Sheng Xie
A 25 Gbps inductorless optical receiver analog front-end based the modified Cherry-Hooper amplifier for optical interconnect. 105047 - Luis Miguel Carvalho Freitas
Column amplification stages in CMOS image sensors based on incremental sigma-delta ADCs. 105055 - Romain David
Design of integrated laser diode driver for 3D-depth sensing applications. 105056 - Marco A. Saif
A 20-Gb/s charge-steering equalizer utilizing highly-efficient charge-steering linear equalizer. 105057 - B. Jeevan
Design of 0.8V, 22 nm DG-FinFET based efficient VLSI multiplexers. 105059
- Quanzhen Duan
A 2.1 ppm/°C, 0.55-2.4 V, 5.6 nW, 235 mV, CMOS-only subthreshold voltage reference. 105060
- Lianxi Liu
A single-inductor thermoelectric and photovoltaic hybrid harvesting interface with time-multiplexed technology and accurate zero current detector. 105062 - Pritty
Ultra low power current mirror design with enhanced bandwidth. 105063 - Xiaoming Liu, Jing Jin, Xiaofei Wang, Jianjun Zhou
A 2.4 GHz receiver with a current-reused inductor-less noise-canceling balun LNA in 40 nm CMOS. 105065 - Zhou Mengxia, Zhao Yang, Zhang Cheng, Xingfa Liu, Wu Xianqiang, Sun Yiqun, Yan Wei:
Predicting the impact of transient voltage suppressor used for ESD protection on the low noise amplifier. 105066 - Shaoqing Mo, Rongshan Wei
A multiple-sensitivity Hall sensor featuring a low-cost temperature compensation circuit. 105067 - Zhang Zhang
A novel control circuit for piezoelectric energy harvesting. 105068 - Amr Mohammaden, Mohammed E. Fouda, Ihsen Alouani
CNTFET design of a multiple-port ternary register file. 105076 - Pallavi Kumari, Anand Raj, Kumari Nibha Priyadarshani
Impact of temperature and interface trapped charges variation on the Analog/RF and linearity of vertically extended drain double gate Si0.5Ge0.5 source tunnel FET. 105077 - Abdelaziz Lberni
Efficient butterfly inspired optimization algorithm for analog circuits design. 105078 - Fatemeh Safipoor, Reza Faghih Mirzaee
High-performance quaternary latch and D-Type flip-flop with selective outputs. 105079 - Rajesh Saha:
Simulation study on ferroelectric layer thickness dependence RF/Analog and linearity parameters in ferroelectric tunnel junction TFET. 105081 - Saeideh Sheikhpour
High-throughput configurable SIMON architecture for flexible security. 105085 - M. Rahimi, M. B. Ghaznavi-Ghoushchi:
A fanout-improved Parallel Prefix Adder with full-swing PTL cells and Graded Bit Efficiency. 105086 - Neda Rezaei
Ultra low-power negative DC voltage generator based on a proposed level shifter and voltage reference. 105087 - Zhibo Zhu, Yang Zhao, Wei Yan, Xingfa Liu, Ming Ju:
Modeling of line impedance stabilization network impedance characteristic based on genetic algorithm. 105095 - R. Arundeepakvel, Jatin
A novel design for voltage inverting metamutator and its applications. 105096 - Rafael Sanchotene Silva
A compact QRS detection system based on 0.79 μW analog CMOS energy-of-derivative circuit. 105097 - Xiang Liu
Organic/amorphous silicon hybrid tandem solar cell with PDPP3T as organic active layer. 105098 - Farzaneh Izadinasab, Morteza Gholipour
Half-select disturb-free single-ended 9-transistor SRAM cell with bit-interleaving scheme in TMDFET technology. 105100 - Mihika Mahendra, Shweta Kumari, Maneesha Gupta
Low voltage high performance super class AB OTA design using SCCM and DTMOS with enhanced slew rate and DC gain. 105101
- Yun Fang, Zhong Tang, Xiao-Peng Yu, Zhiwei Xu, Hao Gao
Broadband linearity enhancement method for a 1.3 GHz-2.5 GHz digitally-assisted oscillator in a 55-nm CMOS technology. 105103
- Nitish Kumar
Modeling the threshold voltage of core-and-outer gates of ultra-thin nanotube Junctionless-double gate-all-around (NJL-DGAA) MOSFETs. 105104 - Farzin Mahboob Sardroudi
CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic. 105105
- Yang Liu
A 24 GHz PLL with low phase noise for 60 GHz Sliding-IF transceiver in a 65-nm CMOS. 105106
- Li Dong
A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array. 105109
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