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Microprocessing and Microprogramming, Volume 27
Volume 27, Numbers 1-5, August 1989
- Friedrich Winkelhage:
Chairman's introduction. vii - Michael Jackson:
Methodology for the 90's. 7-15 - John G. Hughes:
Microcomputer implementations of an object-oriented, multiprocessing database programming language. 19-23 - Stefan Böttcher, Christoph Beierle:
Database support for the PROTOS-L system. 25-30 - Massimo Ancona, L. Giardina, M. E. Rollero:
An object-manager for handling persistent data in Modula-2. 31-36 - Francois Contreiras, Hervs Avril, Derek Wilson, Steve Winter:
Synthesis of an intelligent environment for object recognition using tactile data. 39-46 - Bing Lam Luk
, Fazel Naghdy, John Billingsley
Stochastic force sensing application in robotics. 47-51 - J. Pu, R. Harrison, Richard H. Weston, Philip R. Moore:
Software design of distributed single-axis motion controllers for industrial applications. 53-60 - Rajiv R. Parihar, Paul P. Dasiewicz:
A methodology for structural & behavioural understanding of digital systems. 63-68 - Martin Hulin, Jochen Heistermann:
Partitioning of digital designs: a knowledge based approach and concepts for its parallelization. 69-75 - L. K. Alberts, Corrie Huijs, Nicolaas J. I. Mars, Lambert Spaanenburg:
A knowledge-based approach to VLSI-design in an open CAD-environment. 77-84 - Teodor Jové
Reduced instruction buffer for RISC architectures. 87-93 - Johannes M. Mulder:
Inter: An inexpensive inter-procedural register allocator. 95-100 - Peter Deussen, Wolfgang Rosenstiel, Klaus Erik Schaufer, Jörg Wedeck:
Architecture design of a RISC-processor for prolog. 101-108 - Mike P. Papazoglou
On integrating database modeling constructs for software engineering databases. 113-120 - Iztok Savnik, Franc Novak:
A construction database model. 121-126 - S. Goutas, P. Soupos, Dimitris Christodoulakis:
A new approach towards an object-oriented database system. 127-132 - Stephen J. Flavell, Stephen C. Winter, Derek R. Wilson, P. Fernin:
A comparison of frameworks for cooperation is distributed image registration systems. 135-141 - Pekka Jokitalo, E. Honkanen, I. Moring, H. Palo, Kyösti Rautiola
Transputer based digital signal processing unit for A 3-D vision system. 143-146 - Doron Ben-Tzvi, Mark B. Sandler:
Efficient parallel implementation of the hough transform on a distributed memory system. 147-152 - Raymond T. Boute:
Syntactic and semantic aspects of formal system description. 155-161 - Zmago Brezocnik, Bogomir Horvat:
Formal hardware specification and verification using prolog. 163-170 - Paolo Camurati, Tiziana Margaria
Systolic array description in F2. 171-178 - Thomas Korb, Andreas Zell:
A declarative neural network description language. 181-188 - Jos Nijhuis, Lambert Spaanenburg, Frank Warkowski:
Structure and application of NNSIM: a general-purpose neural network SIMulator. 189-194 - Peter Buhler, Dieter Wybranietz:
Tools for distributed programming in the INCAS project. 199-206 - Eugeniusz Eberbach
PARLE: A language for expressing parallelism and integrating symbolic and numeric computations. 207-214 - Mike O'Dowd:
MEX, a programming language that supports discrete event simulation. 215-220 - A. M. Levy, Adrianus J. van de Goor, Jan van Katwijk:
Distributed system design using Ada as a tool for prototyping. 221-230 - Esko Strömmer:
A fault tolerant control computer for the aspera plasma instrument of phobos spacecraft. 233-237 - Juha-Pekka Soininen, Matti Sipola, Kari Tiensyrjä:
SW/HW-partitioning of real-time embedded systems. 239-244 - J. Dodrill, Nick Kanopoulos:
On the design of a real-time digital median filter. 245-249 - H. C. van der Bij, Gerard J. M. Smit, Paul J. M. Havinga:
Hardware support for the tumult real-time scheduler. 251-257 - Raymond T. Boute:
Session C3: Formal methods II. 259-260 - Luc Claesen, R. T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, Diederik Verkest:
Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module - a case study. 261-266 - H. Oolman, M. Seutter, C. van Reeuwijk:
Glass, a language for analog and digital circuit description, and its environment. 267-271 - Jozef De Man, Johan Vanslembrouck:
Transformational design of digital circuits. 273-278 - W. Ploegaerts, Diederik Verkest, Luc Claesen, Hugo De Man:
Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language. 279-286 - Antonio Núñez
MVM: A GaAs microprocessor for critical real-time applications. 289-298 - Emilio L. Zapata, Ramón Doallo, Senén Barro
A DBT-based VLSI systolic architecture for hard squared error clustering. 299-305 - Edwige E. Pissaloux, Louis Nolin:
NL1 Machine - A concept of a high performance data type architecture. 307-314 - Jurij Silc, Borut Robic:
Synchronous dataflow-based architecture. 315-322 - Max Mühlhäuser
A software engineering environment for distributed applications. 327-332 - A. Petkov, Tz. Tzonev:
Diprotalk: A tool for object-oriented design of distributed applications. 333-338 - Anna Ciampolini, Antonio Corradi
Parallel object system support on transputer-based architectures. 339-345 - Massimo Ancona, Andrea Clematis
32-Bit microprocessor architectures and extended abstract machines for high level languages. 349-354 - Jörg Lohse, Reinhard Rauscher, Bernd Schütz:
A coprocessor for implementing the LISP-dialect scheme. 355-362 - Wei Lin, Yi-Ren Du, Zhi-Zhu Li:
A design of microcomputer speech output device. 363 - I. Causarano, R. Guizzeti, M. Pipponzi, Fabio Somenzi:
MSYN: Automatic synthesis of hardware. 367-372 - Roy D. Dowsing, R. Elliott, M. Templeton, G. Williams, Frank Woodhams:
A framework for the synthesis of hardware from occam. 373-379 - Peter Marwedel, Wolfgang Schenk:
Improving the performance of high-level synthesis. 381-387 - I. Hannequin, Gilles Goncalves
Prolog: A new parallel evaluation scheme. 391-396 - Michael A. Kelly, Rudolph E. Seviora:
Performance of OPS5 matching on CUPID. 397-404 - Jian Luo, F. Bruggeman, Gerard Louis Reijns:
A flexible transputer network for numerical applications. 405-411 - Daniel Crookes, Philip J. Morrow, B. Sharif, I. McClatchey:
An environment for developing concurrent software for transputer-based image processing. 417-422 - Marcos José Santana, E. J. Zaluska:
A high-level coordinator in a distributed filestore architecture. 423-430 - Andrea Domenici
A protocol for resource locking and deadlock detection in a multi-user environment. 431-437 - Martin D. Beer:
The use of an office information server in an environment based on high-performance workstations. 441-446 - Pierluigi Della Vigna, P. Faverio, F. Macchiavello, Franco Mercalli
Structure and performances of a campus-wide IBM token ring multi-network. 447-454 - Friedemann Mattern, Peter Sturm:
An automatic distributed calendar and appointment system. 455-462 - J. Geßner, Thomas Bergsträsser, Stefan Wallstab:
Synthesis of control units in a design environment for chip architecture. 465-471 - Auli Reinikka, Antti Auer, Ari Okkonen
Automatic synthesis of structural HDL descriptions from graphic specification of embedded asics. 473-478 - Reiner W. Hartenstein, Karin Lemmert, Michael Riedmüller:
Synthesis of systolic architectures using the SYS3 system. 479-486 - Jan R. Just, Ryszard S. Romaniuk
Highly parallel distributed computing systems with optical interconnections. 489-493 - Massimo Maresca, Arrigo L. Frisiani, Tullio Vernazza:
Floating point acceleration in massively parallel architectures. 495-500 - Emilio L. Zapata, Javier D. Bruguera, Oscar G. Plata
A parallel markovian model reliability algorithm for hypercube networks. 501-508 - Ari Okkonen
Sokrates-SA - A formal method for specifying real-time systems. 513-520 - M. Collado, R. Morales, J. J. Moreno:
Converstion modules: A methodological approach to the design of real-time applications. 521-526 - Giovanni Cantone, A. Esposito:
A D-graph based approach for verifying response time of "critical" programs. 527-532 - Yukiko Mizuhashi, Masanori Teramoto:
Real-time UNIX operating system: RX-UX 832. 533-538 - Antonio Camurri
Temporal logic issues in music knowledge representation. 541-546 - A. T. Clarke, B. M. Brown, M. P. Thorne:
Coping with some really rotten problems in automatic music recognition. 547-550 - Paul Amblard, Henri-Pierre Charles
Music synthesis description with the data flow language lustre. 551-556 - Mark Sandler:
High complexity resonator structures for formant synthesis of musical instruments. 557-562 - Werner Haas, Michiel Beunder, Jürgen Kernhof:
Characteristics and requirements of semi-custom design tools. 565-570 - E. Aposporidis, F. Lohnert, P. Mehring, F. Hoppe, Hans-Ulrich Post:
PMLS - A parallel multi-level VLSI simulator. 571-577 - Per Nylén:
An integrated development system for the MC68705 single chip computer. 579-581 - Wolfgang A. Halang:
Languages and tools for the graphical and textual system independent programming of programmable logic controllers. 583-590 - Juarez A. Muylaert Filho, Edil S. T. Fernandes:
Microprogrammed implementation of a reduction machine. 593-600 - W. Schenk:
A high speed prolog implementation on a VLIW processor. 601-605 - Marek Gondzio:
Verification oriented approach to concurrent microprogramming with the language C-MIDDLE. 607-618 - Erik Dirkx:
IMISSED: Interactive microprocessor instruction set simulation environment with graphical display. 619-621 - Uwe Schult:
A graphics-only programming tool. 627-632 - Thomas Hiller:
Process programming using graphical objects. 633-638 - Tuomas Ihme:
A reuse base for real-time software specifications. 639-646 - Jonathan S. Ostroff:
Mechanizing the verification of real-time discrete systems. 649-656 - Al Mok, Louis E. Rosier, Igor Tulchinsky, Donald A. Varvel:
Algorithms and complexity of the periodic maintenance problem. 657-664 - Marek A. Suchenek, Xitong Zheng, Golam Sarwar:
Non-invasive testing of real-time avionic μ-processor systems. 665-671 - Gerold Alfs, Reiner W. Hartenstein, Andrea Wodtko:
Explicit fault modeling and hierarchical test pattern generation in the KARATE system. 675-680 - Heinrich Theodor Vierhaus:
Testability of non-trivial CMOS faults under realistic conditions. 681-686 - Johannes Pfeifer, Michael G. Wahl, Hans Wojtkowiak:
Data exchange formats for testing. 687-693 - Vincenzo Piuri:
Optimum design of fault-tolerant arithmetic array processors by using data coding. 697-704 - Henrique Madeira
The fault-tolerant architecture of the safe system. 705-712 - Carsten Vogt, Klaus von der Heide:
PUMA: Hardware support for fault-tolerance and object-oriented programming. 713-719 - Kyösti Rautiola, Tuomo Näyhä, Kari Kaarela:
Parallel processing in machine automation. 723-730 - Thomas Reus:
Acceleration of circuit simulation on a parallel transputer workstation. 731-737 - M. A. van Peursem, P. Knoppers, Ad J. van de Goor:
TLS: a system for building and controlling transputer networks. 739-746 - Massimo Annunziata, Gianluigi Decarlini, Calogero Malaponti, Italtel Sit:
NETPLAN: A rule based system to design packet switching data networks. 749-756 - Perfecto Mariño, Roy A. Maxion:
Expert system design for symptom based diagnosis in local area networks. 757-764 - Jen-Yao Chung, Wei-Kuan Shih, Jane W.-S. Liu, Donald W. Gillies:
Scheduling imprecise computations to minimize total error. 767-774 - Xiaoping Yuan, Ashok K. Agrawala:
Real-time scheduling with both preemption and nonpreemption requirements. 775-782 - Gerhard Roos, Jens Leenstra, Thomas Schwederski, Lambert Spaanenburg, Bernd Höfflinger:
On structured gate forest VLSI design. 785-792 - Giancarlo Storti Gajani:
Some proposals for VLSI implementation of digital PID controllers with some fault-tolerance capabilities. 793-796 - Guy A. S. Wingate, Clive Preece:
Performance evaluation of a new design-tool for microprocessor transient fault recovery. 801-808 - Ophir Frieder, Ami Litman, Mark E. Segal:
DUNIX: Distributed operating systems education via experimentation. 811-818 - Koenraad De Bosschere:
EDULAN, a tool for teaching synchronization. 819-825
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