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Design Automation for Embedded Systems, Volume 17
Volume 17, Number 1, March 2013
- Mehdi Kamal, Amir Yazdanbakhsh
, Hamid Noori
A new merit function for custom instruction selection under an area budget constraint. 1-25 - Gayatri Mehta, Alex K. Jones
Implementation and validation of architectural space exploration techniques for domain-specific reconfigurable computing. 27-51 - Heikki Orsila, Erno Salminen, Timo Hämäläinen:
Recommendations for using Simulated Annealing in task mapping. 53-85 - Shenglin Gui, Lei Luo:
Reliability analysis of real-time fault-tolerant task models. 87-107 - Ridha Djemal, Kais Belwafi
An adaptive CFAR embedded system architecture for target detection. 109-127 - Horacio Hoyos Rodriguez
Tucan - Virtual prototype generation and time constraints analysis of real-time embedded systems. 129-165 - Rize Jin, Hyung-Ju Cho, Sang-Won Lee, Tae-Sun Chung:
Lazy-split B+-tree: a novel B+-tree index scheme for flash-based database systems. 167-191 - Rajendra Patel, Arvind Rajawat
Recent trends in embedded system software performance estimation. 193-213
Volume 17, Number 2, June 2013
- Reinaldo A. Bergamaschi, Sanjoy K. Baruah, Sebastian Fischmeister, Robert P. Dick, Jan Madsen, Rajesh Gupta, Vincent John Mooney III:
Introductions to special issue on ESWEEK 2011. 215-219 - Mohamed A. Bamakhrama
On the hard-real-time scheduling of embedded streaming applications. 221-249 - Borzoo Bonakdarpour, Marius Bozga, Jean Quilbeuf:
Model-based implementation of distributed systems with priorities. 251-276 - Björn B. Brandenburg, James H. Anderson:
The OMLP family of optimal multiprocessor real-time locking protocols. 277-342 - Stefan Wildermann, Felix Reimann, Daniel Ziener
Symbolic system-level design methodology for multi-mode reconfigurable systems. 343-375 - Luis Angel D. Bathen, Dongyoun Shin, Sung-Soo Lim, Nikil D. Dutt
Virtualizing on-chip distributed ScratchPad memories for low power and trusted application execution. 377-409 - Tayyeb Mahmood, Soontae Kim:
Fault buffers - Enabling near-true voltage scaling in variation-sensitive L1 caches. 411-438 - Xuemeng Zhang, Hui Wu
Instruction scheduling with k-successor tree for clustered VLIW processors. 439-458
Volume 17, Numbers 3-4, September 2013
- Manu Perumkunnil Komalan, José Ignacio Gómez Pérez
Design exploration of a NVM based hybrid instruction memory organization for embedded platforms. 459-483 - Penglin Dai, Qingfeng Zhuge, Xianzhang Chen
Effective file data-block placement for different types of page cache on hybrid main memory architectures. 485-506 - Hamza Ouarnoughi, Jalil Boukhobza
Performance analysis and modeling of SQLite embedded databases on flash file systems. 507-542 - Huizhang Luo, Qingfeng Zhuge, Liang Shi, Jian Li, Edwin Hsing-Mean Sha:
Accurate age counter for wear leveling on non-volatile based main memory. 543-564 - Qi Zhang, Xuandong Li, Linzhang Wang, Tian Zhang, Yi Wang
Data-assemblage: a translation-page-aware data block allocation strategy for flash-based solid state drives. 565-586 - Romain Brillu, Sébastien Pillement
Cluster based MPSoC architecture: an on-chip message passing implementation. 587-607 - Su-Kyung Yoon, Mei-Ying Bian, Shin-Dug Kim:
An integrated memory-disk system with buffering adapter and non-volatile memory. 609-626 - Joon-Young Paik, Tae-Sun Chung, Eun-Sun Cho
Loop transformations for flash memory: cost models and performance effects. 627-667 - Iason Filippopoulos
Exploration of energy efficient memory organisations for dynamic multimedia applications using system scenarios. 669-692 - Kwangil Choi, Hyunok Oh:
An energy aware buffer mapping technique on hybrid STT-MRAM memories with multiple retention time for stream applications. 693-710 - Jian Li, Qingfeng Zhuge, Duo Liu, Huizhang Luo, Edwin Hsing-Mean Sha:
A content-aware writing mechanism for reducing energy on non-volatile memory based embedded storage systems. 711-737 - Oliver Mattes, Wolfgang Karl:
Self-aware Memory: an adaptive memory management system for upcoming manycore architectures and its decentralized self-optimization process. 739-769
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