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19th HPSR 2018: Bucharest, Romania
- IEEE 19th International Conference on High Performance Switching and Routing, HPSR 2018, Bucharest, Romania, June 18-20, 2018. IEEE 2018, ISBN 978-1-5386-7801-5
- YiXi Gong, James Roberts, Dario Rossi:
Per-Flow Fairness in the Datacenter Network. 1-6 - Huy Quang Duong, Brigitte Jaumard, David Coudert, Ron Armolavicius:
Efficient Make Before Break Capacity Defragmentation. 1-6 - Hasan Redzovic, Aleksandra Smiljanic, Mihailo Vesovic:
Fast Quagga Data Plane Based on Netmap Platform. 1-6 - Jie Xiao, Kwan L. Yeung, Sugih Jamin:
A New Scheduling Algorithm for Input-Queued Switches with Mixed Unicast and Multicast Traffic. 1-6 - Xiaoliang Wang, Cam-Tu Nguyen, Baoliu Ye, Zhuzhong Qian, Bin Tang, Wenzhong Li, Sanglu Lu:
Nem: Toward Fine-grained Load Balancing through RNIC EC Offloading. 1-6 - Salvatore Pontarelli, Giuseppe Bianchi, Michael Welzl
:
A Programmable Hardware Calendar for High Resolution Pacing. 1-6 - Ken Nagatomi, Yusuke Hirota, Hideki Tode, Takashi Watanabe
Dynamic Spectrum Sharing Method in SDM based Optical Packet and Circuit Integrated Networks. 1-6 - William M. Mellette, Alex C. Snoeren, George Porter:
Toward Optical Switching in the Data Center (Invited Paper). 1-6 - Jie Xiao, Kwan L. Yeung, Sugih Jamin:
Scheduling Mixed Unicast and Multicast Traffic with Variable-Size Packets in Input-Queued Switches. 1-6 - Tuncay Soylu
Real-Time Traffic Classification using Simple CART Forest on FPGAs. 1-8 - Tom Barbette
Building a chain of high-speed VNFs in no time: Invited Paper. 1-8 - Sebastiano Miano
Creating Complex Network Services with eBPF: Experience and Lessons Learned. 1-8 - Pedro Reviriego, Salvatore Pontarelli, Anees Ullah, Ali Zahir, Giuseppe Bianchi:
Multiple Hash Matching Units (MHMU): An Algorithmic Ternary Content Addressable Memory Design for Field Programmable Gate Arrays. 1-6 - Roberto Bifulco, Gábor Rétvári:
A Survey on the Programmable Data Plane: Abstractions, Architectures, and Open Problems. 1-7 - Adrian M. Caulfield, Paolo Costa, Monia Ghobadi:
Beyond SmartNICs: Towards a Fully Programmable Cloud: Invited Paper. 1-6 - Cyriel Minkenberg, Germán Rodríguez, Nick Kucharewski:
Redefining the Economics of Reach with Integrated Optics. 1-8 - Péter Vörös, Dániel Horpácsi, Róbert Kitlei, Dániel Leskó, Máté Tejfel, Sándor Laki:
T4P4S: A Target-independent Compiler for Protocol-independent Packet Processors. 1-8 - Koji Yamazaki, Yuta Ukon, Shuhei Yoshida, Saki Hatta, Yusuke Sekihara, Shoko Ohteru, Tomoaki Kawamura, Takahiro Hatano, Koyo Nitta
Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane. 1-6 - Michael Schapira:
Network-Model-Based vs. Network-Model-Free Approaches to Internet Congestion Control. 1-8 - Yuki Hirano, Fujun He, Takehiro Sato, Eiji Oki:
Backup Network Design Scheme for Multiple Link Failures to Avoid Overestimating Link Capacity. 1-6
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