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14th HPCA 2008: Salt Lake City, UT, USA
- 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA. IEEE Computer Society 2008, ISBN 978-1-4244-2070-4
Keynote I
- Joe Rattner:
Intel's Tera-scale Computing Project: The first five years, the next five years. 1
Industrial Session
- Valentina Salapura, Matthias A. Blumrich, Alan Gara:
Design and implementation of the blue gene/P snoop filter. 5-14 - Kevin Leigh, Parthasarathy Ranganathan, Jaspal Subhlok:
Fabric convergence implications on systems architecture. 15-26 - Qian Diao, Justin J. Song:
Prediction of CPU idle-busy activity pattern. 27-36
Path and Branch Prediction
- Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt:
Performance-aware speculation control using wrong path usefulness prediction. 39-49 - Kshitiz Malik, Mayank Agarwal, Vikram Dhar, Matthew I. Frank:
PaCo: Probability-based path confidence prediction. 50-61 - Kshitiz Malik, Mayank Agarwal, Sam S. Stone, Kevin M. Woley, Matthew I. Frank:
Branch-mispredict level parallelism (BLP) for control independence. 62-73 - Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zhou
:
Address-branch correlation: A novel locality for long-latency hard-to-predict branches. 74-85
Power and Thermal Management
- Luis Useche, Jorge Guerra, Medha Bhadkamkar, Mauricio Alarcon, Raju Rangaswami:
EXCES: External caching in energy saving storage systems. 89-100 - Xiaorui Wang, Ming Chen:
Cluster-level feedback power control for performance optimization. 101-110 - Luiz E. Ramos, Ricardo Bianchini:
C-Oracle: Predictive thermal management for data centers. 111-122 - Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, David M. Brooks:
System level analysis of fast, per-core DVFS using on-chip switching regulators. 123-134
SMT
- Samantika Subramaniam, Milos Prvulovic, Gabriel H. Loh:
PEEP: Exploiting predictability of memory dependences in SMT processors. 137-148 - Tanausú Ramírez, Alex Pajuelo
Runahead Threads to improve SMT performance. 149-158
Security
- Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin:
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors. 161-172 - Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic:
FlexiTaint: A programmable accelerator for dynamic taint propagation. 173-184
Keynote II
- Mark D. Hill:
Amdahl's Law in the multicore era. 187
Network-on-Chip
- M. Frank Chang
CMP network-on-chip overlaid with multi-band RF-interconnect. 191-202 - Paul Gratz
Regional congestion awareness for load balance in networks-on-chip. 203-214 - Reetuparna Das
Performance and power optimization through data compression in Network-on-Chip architectures. 215-225
Microarchitecture Modeling and Analysis
- Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, Ciji Isen:
Automated microprocessor stressmark generation. 229-239 - Benjamin C. Lee, David M. Brooks:
Roughness of microarchitectural design topologies and its implications for optimization. 240-251 - Pierre Salverda, Craig B. Zilles:
Fundamental performance constraints in horizontal fusion of in-order cores. 252-263 - Philip M. Wells, Gurindar S. Sohi:
Serializing instructions in system-intensive workloads: Amdahl's Law strikes again. 264-275
Code Analysis and Optimization
- JaeWoong Chung, Michael Dalton, Hari Kannan, Christos Kozyrakis:
Thread-safe dynamic binary translation using transactional memory. 279-289 - Hongtao Zhong, Mojtaba Mehrara, Steven A. Lieberman, Scott A. Mahlke:
Uncovering hidden loop level parallelism in sequential applications. 290-301
DRAM
- Ibrahim Hur, Calvin Lin:
A comprehensive approach to DRAM power management. 305-316 - Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
Power-Efficient DRAM Speculation. 317-328 - Richard H. Larson, John K. Salmon, Ron O. Dror
High-throughput pairwise point interactions in Anton, a specialized machine for molecular dynamics simulation. 331-342 - Jeffrey Kuskin, Cliff Young, J. P. Grossman, Brannon Batson, Martin M. Deneroff, Ron O. Dror
Incorporating flexibility in Anton, a specialized machine for molecular dynamics simulation. 343-354 - Christian Fensch, Marcelo Cintra:
An OS-based alternative to full hardware coherence on tiled CMPs. 355-366 - Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan:
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems. 367-378
Reliability and Validation
- Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David M. Brooks:
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors. 381-392 - M. Wasiur Rashid, Michael C. Huang
Supporting highly-decoupled thread-level redundancy for parallel programs. 393-404 - Sumeet Kumar, Aneesh Aggarwal:
Speculative instruction validation for performance-reliability trade-off. 405-414 - Kaiyu Chen, Sharad Malik
Runtime validation of memory ordering using constraint graph checking. 415-426
Keynote
- Frances E. Allen:
Compilers and parallel computing systems. 429
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