Search Results (55)

Amyotrophic Lateral Sclerosis (ALS) is a poorly understood and fatal disease. It has a low prevalence and a 2–4 year survival period. Various theories and hypotheses relating to its development process have been proposed, albeit with no breakthrough in its treatment. Recently, the role of the adaptive immune system in ALS, particularly CD4+ T cells, has begun to be investigated. CD4+ T cells are a heterogeneous group of immune cells. They include highly pro-inflammatory types such as Th1 and Th17, as well as highly anti-inflammatory cells such as Tregs. However, the landscape of the role of CD4+ T cells in ALS is still not clearly understood. This review covers current hypotheses that elucidate how various CD4+ T cells can contribute to ALS development. These hypotheses include the SWITCH model, which suggests that, in the early stages of the disease, Tregs are highly capable of regulating the immune response. However, in the later stages of the disease, it seems that pro-inflammatory cells such as Th1 and Th17 are capable of overwhelming Treg function. The reason why this occurs is not known. Several research groups have proposed that CD4+ T cells as a whole might experience aging. Others have proposed that gamma delta T cells might directly target Tregs. Additionally, other research groups have argued that less well-known CD4+ T cells, such as Emoes+ CD4+ T cells, may be directly responsible for neuron death by producing granzyme B. We propose that the ALS landscape is highly complicated and that there is more than one feasible hypothesis. However, it is critical to take into consideration the differences in the ability of different populations of CD4+ T cells to infiltrate the blood–brain barrier, taking into account the brain region and the time of infiltration. Shedding more light on these still obscure factors can help to create a personalized therapy capable of regaining the balance of power in the battle between the anti-inflammatory and pro-inflammatory cells in the central nervous system of ALS patients. Full article

This paper presents a wideband fractional-N all-digital phase-locked loop (WBPLL) architecture featuring a triple-loop configuration capable of tuning frequencies from 1.9 to 6.1 GHz. The first and second loops, automatic frequency control (AFC) and counter-assisted phase-locked loop (CAPLL), respectively, perform coarse locking, while the third loop employs a digital sub-sampling architecture without a frequency divider for fine locking. In this third loop, fractional-N frequency synthesis is achieved using a delta-sigma modulator (DSM) and digital-to-time converter (DTC). To minimize area, digital modules such as counters, comparators, and differentiators used in the AFC and CAPLL loops are reused. Furthermore, a moving average filter (MAF) is employed to reduce the frequency overlap ratio of the digitally controlled oscillator (DCO) between the second and third loops, ensuring stable loop switching. The total power consumption of the WBPLL varies with the frequency range, consuming between 8.8 mW at the WBPLL minimum output frequency of 1.9 GHz and 12.8 mW at the WBPLL maximum output frequency of 6.1 GHz, all at a 1.0 V supply. Implemented in a 28 nm CMOS process, the WBPLL occupies an area of 0.055 mm². Full article

Astrocytes play a pivotal role in maintaining brain homeostasis. Recent research has highlighted the significance of palmitic acid (PA) in triggering pro-inflammatory pathways contributing to neurotoxicity. Furthermore, Genomic-scale metabolic models and control theory have revealed that metabolic switches (MSs) are metabolic pathway regulators by potentially exacerbating neurotoxicity, thereby offering promising therapeutic targets. Herein, we characterized these enzymatic MSs in silico as potential therapeutic targets, employing protein–protein and drug–protein interaction networks alongside structural characterization techniques. Our findings indicate that five MSs (P00558, P04406, Q08426, P09110, and O76062) were functionally linked to nervous system drug targets and may be indirectly regulated by specific neurological drugs, some of which exhibit polypharmacological potential (e.g., Trifluperidol, Trifluoperazine, Disulfiram, and Haloperidol). Furthermore, four MSs (P00558, P04406, Q08426, and P09110) feature ligand-binding or allosteric cavities with druggable potential. Our results advocate for a focused exploration of P00558 (phosphoglycerate kinase 1), P04406 (glyceraldehyde-3-phosphate dehydrogenase), Q08426 (peroxisomal bifunctional enzyme, enoyl-CoA hydratase, and 3-hydroxyacyl CoA dehydrogenase), P09110 (peroxisomal 3-ketoacyl-CoA thiolase), and O76062 (Delta(14)-sterol reductase) as promising targets for the development or repurposing of pharmacological compounds, which could have the potential to modulate lipotoxic-altered metabolic pathways, offering new avenues for the treatment of related human diseases such as neurological diseases. Full article

Background: Currently approved vaccines are highly effective in protecting against hospitalization and severe COVID-19 infections. How pre-existing immunity responds to new variants with mutated antigens is crucial information for elucidating the functional interplay between antibodies and B and T cell responses during infection with new SARS-CoV-2 variants. Methods: In this study, we monitored the dynamics and persistence of the immune response versus different SARS-CoV-2 variants of concern that emerged during the pandemic period (2021–2022) in a cohort of vaccinated healthcare workers, who experienced breakthrough infection in the Pre-Delta, Delta, and Omicron waves. We evaluated both the humoral and cell-mediated responses after infection. We also evaluated the anti-SARS-CoV-2 antibodies levels produced by infection in comparison with those produced after vaccination. Results: Our results highlighted that the immune response against the Delta VOC mainly involved an adaptive humoral and switched memory B cells component, even 3 months after the last vaccine dose, conversely showing a high percentage of depleted adaptive T cells. Omicron infections triggered a consistent production of non-vaccine-associated anti-N antibodies, probably to balance the spike epitope immune escape mechanisms. Conclusion: Our results suggest a direct dependence between the VOC and different humoral and B and T cell balances in the post-infection period, despite the administration of a different number of vaccine doses and the elapsed time since the last vaccination. Full article

This article presents a new modulation technique called three-dimensional sigma–delta (3D-$\Sigma \Delta$) modulation for high-frequency three-leg four-wire voltage source converters (VSCs) that use wide-bandgap (WBG) semiconductors. These WBG devices allow for the use of high switching frequencies with a greater efficiency than silicon devices. The proposed 3D-$\Sigma \Delta$ technique enables operation at a variable switching frequency, resulting in a significant reduction in switching losses compared to classical pulse-width modulation (PWM) techniques. Moreover, the 3D-$\Sigma \Delta$ technique uses a fast-processing 3D quantiser that simplifies implementation and considerably reduces computational costs. The behaviour of the 3D-$\Sigma \Delta$ modulation is analysed using MATLAB/Simulink and PLECS. The experimental results performed on an active power filter that uses silicon carbide (SiC) MOSFETs demonstrate an improvement in converter efficiency compared to the conventional SPWM technique. Additionally, the experimental results show how 3D-$\Sigma \Delta$ allows for the compensation of harmonics and homopolar currents, thereby balancing the electrical grid currents. The experiments also show that the proposed 3D-$\Sigma \Delta$ modulation outperforms an SPWM technique in terms of power quality, since the former achieves a larger reduction in the harmonic content of the power grid. In conclusion, the proposed modulation technique is an attractive option for improving the performance of four-wire converters in active power filter applications. Full article

Lifestyle changes regarding diet composition and exercise training have been widely used as a non-pharmacological clinical strategy in the treatment of obesity, a complex and difficult-to-control disease. Taking the potential of exercise in the browning process and in increasing thermogenesis into account, the aim of this paper was to evaluate the effect of resistance, aerobic, and combination training on markers of browning of white adipose tissue from rats with obesity who were switched to a balanced diet with normal calorie intake. Different types of training groups promote a reduction in the adipose tissue and delta mass compared to the sedentary high-fat diet group (HS). Interestingly, irisin in adipose tissues was higher in the resistance exercise (RE) and aerobic exercise (AE) groups compared to control groups. Moreover, in adipose tissue, the fibroblast growth factor 21 (FGF21), coactivator 1 α (PGC1α), and peroxisome proliferator-activated receptor gamma (PPARγ) were higher in response to resistance training RE compared with the control groups, respectively. Additionally, uncoupling protein 1 (UCP1) showed higher levels in response to group AE compared to the HS group. In conclusion, the browning process in white adipose tissue responds differently toward different training exercise protocols, with resistance and aerobic training efficient in activating different biomarkers of the browning process, upregulating irisin, FGF21, PGC1α, PPARγ, and UCP1 in WAT, which together may suggest an improvement in the thermogenic process in the adipose tissue. Considering the experimental conditions of the present investigation, we suggest future research to pave new avenues to be applied in clinical practices to combat obesity. Full article

This paper presents a high resolution delta-sigma modulator for continuous acquisition of electroencephalography (EEG) signals. The third-order single-loop architecture with a 1-bit quantizer is adopted to achieve 22.3-bit resolution. The effects of thermal noise on the performance of the delta-sigma modulator are analyzed to reasonably allocate the switched-capacitor sizes for optimal signal to noise ratio (SNR) and minimum chip area. The coefficients in feedback path and input path are optimized to avoid the signal distortion under the full-scale input voltage range with almost no increase in total capacitance sizes. Fabricated in 0.5 µm CMOS technology and powered by a 5 V voltage supply, the proposed delta-sigma modulator can achieve 136 dB peak SNR with 16 Hz input and 137 dB dynamic range in 100 Hz signal bandwidth with an oversampling ratio of 512. The modulator dissipates 700 µA. The core chip area is 1.96 mm${}^2$. The modulator occupies 1.41 mm${}^2$ and the decimator occupies 0.55 mm${}^2$. Full article

Bridge sensors are widely used in military and civilian fields, and their demand gradually increases each year. Digital sensors are widely used in the military and civilian fields. High-precision and low-power analog-to-digital converters (ADCs) as sensor read-out circuits are a research hotspot. Sigma-delta ADC circuits based on switched-capacitor topology have the advantages of high signal-to-noise ratio (SNR), good linearity, and better compatibility with CMOS processes. In this work, a fourth-order feed-forward sigma-delta modulator and a digital decimation filter are designed and implemented with a correlated double sampling technique (CDS) to suppress pre-integrator low-frequency noise. This work used an active pre-compensator circuit for deep phase compensation to improve the system’s stability in the sigma-delta modulator. The modulator’s local feedback factor is designed to be adjustable off-chip to eliminate the effect of process errors. A three-stage cascade structure was chosen for the post-stage digital filter, significantly reducing the number of operations and the required memory cells in the digital circuit. Finally, the layout design and engineering circuit were fabricated by a standard 0.35 μm CMOS process from Shanghai Hua Hong with a chip area of 9 mm². At a 5 V voltage supply and sampling frequency of 6.144 MHz, the modulator power consumption is 13 mW, the maximum input signal amplitude is −3 dBFs, the 1 Hz dynamic range is about 118 dB, the modulator signal-to-noise ratio can reach 110.5 dB when the signal bandwidth is 24 kHz, the practical bit is about 18.05 bits, and the harmonic distortion is about −113 dB, which meets the design requirements. The output bit stream is 24 bits. Full article

In the summer of 2022, the Po River Delta (Northern Italy), a eutrophication hotspot, was severely affected by high temperatures, exceptional lack of rainfall and saline water intrusion. The effect of saline intrusion on benthic nitrogen dynamics, and in particular the N removal capacity, was investigated during extreme drought conditions. Laboratory incubations of intact sediment cores were used to determine denitrification and DNRA rates at three sites along a salinity gradient in the Po di Goro, an arm of the Po River Delta. Denitrification was found to be the main process responsible for nitrate reduction in freshwater and slightly saline sites, whereas DNRA predominated in the most saline site, highlighting a switch in N cycling between removal and recycling. These results provide evidence that salinity is a key factor in regulating benthic N metabolism in transitional environments. In a climate change scenario, salinity intrusion, resulting from long periods of low river discharge, may become an unrecognized driver of coastal eutrophication by promoting the dissimilatory nitrate reduction to ammonium and N recycling of bioactive nitrogen within the ecosystem, rather than its permanent removal by denitrification. Full article

This paper is concerned with the observer-based $H_{\infty }$ proportional-integral-derivative (PID) control issue for discrete-time systems using event-triggered mechanism subject to periodic random denial of service (DoS) jamming attacks and infinitely distributed delays. In order to characterize the occurrence of periodic random DoS jamming attacks in the network channel between controller and actuator, the Kronecker delta function is used to represent the periodic switching between the sleeping period and attack period, and a Bernoulli-distributed random variable is utilized to reflect the probabilistic occurrence of DoS attacks. Infinitely distributed delay is involved to reflect actual state lag. The relative event-triggering mechanism is employed to reduce unnecessary information transmission and save communication energy in the network channel between sensor and observer. An observer-based PID controller is constructed for the regulation of the system to achieve an appropriate working effect. The aim of this paper is to design a security-guaranteed PID controller for delayed systems such that both the exponential mean-square stability and the $H_{\infty }$ performance are satisfied. Using the Lyapunov stability theory, stochastic analysis method and matrix inequality technique, a sufficient condition is put forward that ensures the existence of the required observer and PID controller. Gain parameters of the observer and the PID controller are computed by solving a certain matrix inequality. A simulation is carried out to verify the effectiveness of the developed observer-based $H_{\infty }$ PID control method. The obtained $H_{\infty }$ noise rejection level is below $0.85$, the average event-based release interval is 13, the absolute values of the maximum estimation error of two elements in the system state are $1.434$ and $0.371$ using the observer, and two elements of the system state converge to $0.238$ and $-0.054$ at the 41th time step with two elements of the control output being $0.031$ and $0.087$. Full article

This paper presents a discrete-time zoom analog-to-digital converter (ADC) for low-bandwidth high-precision applications. It uses a coarse-conversion 5-bit asynchronous self-timed SAR ADC combined with a fine-conversion second-order delta-sigma modulator to efficiently obtain a high signal-to-noise distortion ratio (SNDR). An integrator circuit using a high-gain dynamic amplifier is proposed to achieve higher SNDR. The dynamic amplifier uses a switched tail current source to operate periodically, simplifying the common-mode feedback circuit, reducing unnecessary static current, and improving the PVT robustness. Dynamic error correction techniques, such as redundancy, chopping, and dynamic element matching (DEM) are used to achieve low offset and high linearity. And a 2-bit asynchronous SAR quantizer with an embedded feed-forward adder is used in the second-order delta-sigma modulator to reduce the quantization noise caused by redundancy, and further achieve higher energy efficiency. Simulation results show that the ADC achieves a peak SNDR of 121.1 dB in a 390 Hz bandwidth at a 200 kHz sampling clock while consuming only 170 $\mathsf{\mu }$W from a 2.5 V supply and the core area is 0.55 mm${}^2$. This results in a Schreier figure of merit (FoM) of 184.7 dB. Full article

Inductive voltage transformers are the basic components of the switchgear equipment or electrical substations. This article presents problems related to their operation. Inductive voltage transformers were exposed to specific working conditions in the form of ferroresonance oscillations with the participation of measurement and protective transformers. The disadvantage and negative significance of the phenomenon contributed to the development of the most convenient elimination methods, which is the main goal and achievement of the publication. The analysis of the proposed solutions were carried out on a theoretical model of a 30 kV power network model created and run in the Electromagnetic Transients Program/Alternative Transients Program (EMTP/ATP). The article presents several results of computer simulations carried out together with their complete characteristics (phase voltage waveforms on the primary side of voltage transformers), which allowed us to indicate the disadvantages and advantages of the solutions developed, and choose the most favorable methods to eliminate nonlinear oscillations. In the article, we present an analysis of all aspects contributing to the solution to the problem. This has permitted an appropriate conclusion to be made indicating the advantage of the method based on the use of a damping resistor in the open delta circuit compared to other solutions. Current solutions are largely based on a product using active variation of the resistance of an open delta attached resistor. The concept in this paper is based on a fixed resistance value, which is a different approach to the problem. By using a switch, the resistor is only connected when a fault occurs. Thanks to this solution, the secondary winding of the open delta is not additionally loaded (despite the very high resistance) at all times during the operation of the power network, as is the case with the available solution. Full article

This work presents a macro model for discrete-time sigma‒delta modulators, which can significantly reduce the simulation time compared to transistor level circuits. The proposed macro model is realized by effectively combining active and passive ideal circuit components with Verilog-A modules. As such, since the macro model is a true representation of the actual transistor level circuit, a moderately good accuracy can be obtained. In addition, the proposed macro model includes the major amplifier, comparator, and switch‒capacitor non-idealities of the sigma‒delta modulator such as amplifier DC gain, GBW, slewrate, comparator bandwidth, hysteresis, parasitic capacitance, and switch-on resistance. The results show the simulation time of the proposed macro model sigma‒delta modulator is only 6.43% of the transistor level circuit with comparable accuracy. As a result, the proposed macro model can facilitate the circuit design and leverage non-ideality analysis of discrete-time sigma‒delta modulators. As a practical design example, a second order discrete-time sigma‒delta modulator with a five-level quantizer is realized using the propose macro model for GSM and WCDMA applications. Full article

This paper presents an incremental second-order delta-sigma modulator with a coarse-fine input buffer in 180-nm CMOS. The modulator’s architecture was implemented as a second-order cascade of integrators with a feedback structure. The switched-capacitor integrator was operated in discrete time, with high-gain amplifiers required to achieve improved performance during the integration phase. The amplifier comprised rail-to-rail input and gain-boosted cascode intermediate stages, thus achieving a high gain and wide input voltage range. The circuit adopts a coarse-fine buffer for higher performance. The coarse buffer is operated first to enable fast settling through a high slew rate, followed by the fine buffer to satisfy the low-noise and high-accuracy characteristics. The fine buffer has a smaller current consumption with higher power efficiency. The experiment results show that the proposed input buffer achieved a 13.14 effective number of bits and an 80.87 dB signal-to-noise and distortion ratio. The modulator operates a single bit and sampling clock at 125 kHz. The proposed delta-sigma modulator was operated at 1.8 V. The proposed circuit was designed using a standard 0.18-μm CMOS process with an active area of 1.06 mm². The total current consumption with the coarse-fine buffer was 1.374 mA. Full article

Nowadays, one of the most promising areas in the motor industry is the production of BLDC motors, which are used in a wide range of applications and products—from power tools to electrical vehicles. The windings of BLDC motors are connected according to the Delta or Star circuits. However, such circuits (Delta or Star) do not allow dynamically changing the parameters of the BLDC motor during operation and thus reducing the overall motor efficiency. This paper deals with and proposes an electronic switch of the BLDC motor windings, which brings an advantage in having a capability of dynamically switching the windings during operation and thus increasing the efficiency of the BLDC motor performance. Full article