Open AccessArticle

A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads

Zhenshan Huang

¹,

Zhijie Liu

^1,*,

Gang Shen

²,

Kejun Li

Yuanzong Song

¹ and

Baihe Su

The School of Electrical Engineering, Shandong University, Jinan 250061, China

The School of Rail Transportation, Shandong Jiaotong University, Jinan 250357, China

Author to whom correspondence should be addressed.

Symmetry 2024, 16(9), 1116; https://doi.org/10.3390/sym16091116

Submission received: 16 July 2024 / Revised: 15 August 2024 / Accepted: 23 August 2024 / Published: 28 August 2024

(This article belongs to the Special Issue Advanced Technologies in Electrical and Electronic Engineering, 3rd Edition)

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Browse Figures

Figure 1
Diagram of unbalanced load power supply system. "> Figure 2
Topology of the three phase four-leg converter. "> Figure 3
Average model of the four-leg inverter. "> Figure 4
Diagram of the existing VSG control strategy for a four-leg inverter. "> Figure 5
Problems of the existing control strategy under load variation. "> Figure 6
Equivalent sequential network model of VSG with an unbalanced load. "> Figure 7
Improved VSG control block diagram. "> Figure 8
Diagram of a four-leg inverter transitioning from off-grid to grid-connected operation. "> Figure 9
Improved VSG pre-synchronization control block diagram. "> Figure 10
Schematic diagram of a PLL. "> Figure 11
Pole map of the current control loop with varying kc. "> Figure 12
Pole map of the voltage control loop with varying kr. "> Figure 13
Simulation model of the main circuit and proposed control strategy. "> Figure 14
Simulation results with an unbalanced load. (a) Traditional VSG for a conventional converter [<a href="#B40-symmetry-16-01116" class="html-bibr">40</a>]; (b) traditional VSG [<a href="#B38-symmetry-16-01116" class="html-bibr">38</a>] for a four-leg converter; (c) improved VSG for a four-leg converter. "> Figure 15
Simulation results of voltages of the power grid and four-leg converter under pre-synchronization control. "> Figure 16
Photograph of a down-scaled prototype of the four-leg inverter. "> Figure 17
Single-line diagram of the experimental setup. "> Figure 18
Steady-state waveforms with an unbalanced load. (a) Voltages of a traditional VSG for a conventional inverter; (b) currents of a traditional VSG for a conventional inverter; (c) voltages of a traditional VSG for a four-leg inverter; (d) currents of a traditional VSG for a four-leg inverter; (e) voltages of an improved VSG for a four-leg inverter; (f) currents of an improved VSG for a four-leg inverter. "> Figure 19
Waveforms of frequency with an unbalanced load. "> Figure 20
Waveforms under load being turned on. "> Figure 21
Waveforms of voltages of the power grid and four-leg converter. "> Figure 22
Waveforms of the pre-synchronization process. "> Figure 23
Waveforms under the system turned on with different control parameters. (a) Parameters I; (b) parameters II; (c) proposed optimized parameters. "> Figure 24
Active power waveforms under a system turned on with different control parameters. ">

Versions Notes

Abstract

Virtual synchronous generator (VSG) control has positive effects on the stability of microgrids. In practical power systems, both single-phase loads and three-phase unbalanced loads are present. The four-leg inverter is an alternative solution for the power supply of unbalanced loads and grid connections. The traditional VSG control strategy still faces challenges when using a four-leg inverter to provide a symmetrical voltage and stable frequency in the load power supply and pre-synchronization. This paper proposes a VSG-based control strategy along with a pre-synchronization method for four-leg inverters. An improved VSG control strategy is put forward for four-leg inverters. The improved virtual impedance control and power calculation methods are integrated into the control loop to suppress the voltage asymmetry and frequency ripples. Building on the improved VSG control strategy, a pre-synchronization control approach is proposed to minimize the amplitude and phase angle discrepancies between the inverter output voltage and the power grid voltage. In addition, an optimized design method for control parameters is presented to improve VSG dynamic performance. A hardware prototype of the four-leg inverter is built; the results show that the voltage unbalance ratio can be reduced by 89%, and the response time can be shortened by 50%.

Keywords:

virtual synchronous generator (VSG); four-leg inverter; pre-synchronization; parameters design; unbalanced load

1. Introduction

The advancement of renewable energy and power electronics has facilitated the development of microgrids [1,2,3,4]. The microgrid is capable of operating in either isolated mode or grid-connected mode. The stability of microgrids is challenged by the intermittency and uncertainty of renewable energy generation, as well as the lack of inertia and damping in power electronic converters [5]. The virtual synchronous generator (VSG) has been widely implemented in microgrids [6]. Much research work focuses on the parameter design of VSG. Paper [7] proposes an adaptive virtual inertia that integrates the benefits of both large and small inertia. In addition, in [8], the adaptive virtual inertia and damping coefficient can be used to improve the output during disturbances in the system, which also enhances the dynamic stability of VSG. Particle swarm optimization (PSO) is used in the optimization design of parameters and virtual impedance to enhance the stability of microgrids [9]. Frequency regulation is of great importance to the reliability of microgrids. Since the development of electric vehicles can lead to frequency instability in microgrids, an VSG based frequency control strategy is put forward in [10] to coordinate the demand between the user charging and grid frequency control. Model predictive control (MPC) is integrated into the VSG control loop, which can keep dynamic change to the reference value of the power [11]. In [12], all control loops are replaced with MPC to improve frequency regulation capability further. Moreover, a control method is proposed to enhance the stability of paralleled synchronous generator and virtual synchronous generator [13]. In recent years, most studies on VSG relate to parameter design and control strategies under balanced conditions. Even if the fault is considered, it is mostly considered balanced fault [14]. There are few studies on VSG control under unbalanced conditions. An improved VSG control strategy under imbalanced grid voltage is proposed in [15], which can improve the dynamic performance. In addition, the proposed control strategy makes the output current balanced or active and reactive power constant.

In practical power supply systems, load asymmetry is quite common because of the single-phase loads or asymmetrical three-phase loads. As for the unbalanced load power supply with VSG, there are two considerations: (1) basically, the converter with a grid-forming control strategy can be considered as a voltage source. The symmetrical three-phase voltages need to be provided first. It is different from the converter with grid-following control, which aims to maintain a symmetrical current or power [16,17]. (2) With load asymmetry, the power supply system is in a normal operating state rather than a fault condition.

There is no neutral connection, so a traditional converter with six switches is unable to make the three-phase voltages balanced under unbalanced load. A three-phase four-wire topology is proposed, which can provide the neutral connection [18,19,20,21]. A common way is to add a Dyn transformer after the filter [18]. The fourth wire is connected to the grid side of the transformer instead of the converter. A converter with a four-wire topology has no ability to control zero-sequence voltages directly, due to the Dyn connection of transformers. Topologies that utilize split DC link capacitors are commonly employed to provide a neutral connection [19,20,21]. The neutral point of the AC filter capacitors is connected to the midpoint of the two split DC-link capacitors. Due to the topology involving split DC link capacitors, the zero-sequence current flows through the capacitor, causing a voltage ripple. Thus, large capacity capacitors are required to suppress the voltage ripple.

The topology of a four-leg inverter is presented in [22] for the power supply of an unbalanced load. The modulation method is the key to four-leg inverters. In the process of modulation by a two-dimensional space vector, the sum of base vector is not zero due to the unbalanced output voltages. A three-dimensional space vector modulation (3D-SVM) is introduced, according to the balanced neutral potential [23,24,25]. A carrier-based PWM modulation is put forward in [26]. The fourth leg is modulated independently by calculating the offset zero-sequence voltage. This approach allows for the decoupling of the fourth leg from the other three legs, thereby reducing implementation complexity. In [27], a new carrier-based modulation strategy is put forward for a Z-source three-level four-leg inverter to reduce the leakage of current, which has good fault-tolerance deal capability. The Z-source three-level four-leg inverter is used for its ability to address imbalance problems. The above studies are aimed at voltage source inverters, and the 3D-SVM for four-leg current source inverters was first presented in [28].

In addition to the modulation methods, extensive research has been conducted on control strategies for four-leg converters, with a novel control scheme introduced in [29]. Proportional integral (PI) control is adopted for the main controller, and proportional-resonant (PR) control is used for the fourth-leg controller. The output voltages can be symmetrical under unbalanced nonlinear loads. A resonant-filter-bank controller is used to provide balanced output voltages in [30]. A set of PR controllers are designed to output accurate fundamental voltage and suppress dominant harmonic voltages. High steady-state and dynamic performance can be obtained with the proposed controllers. To obtain better steady-state and dynamic performance, nonlinear control methods are also studied for the four-leg inverter [31,32,33,34,35]. The nonlinear control methods include sliding-mode control [31], model predictive control [32,33], a deadbeat controller [34], and flatness-based grey wolf control [35]. The control results can be guaranteed even in the case of parameter mismatch [31,32,33,34,35]. In addition, VSG are integrated into the control loop of the four-leg inverter for frequency and voltage adjustment [36]. The abovementioned studies are shown in Table 1. Table 1 shows the advantages and disadvantages of different control strategies for a four-leg inverter.

At present, most of the papers relating to four-leg converters focus on modulation and control methods. Few studies focus on control strategy combined with inertia and damping. In [37], an adaptive supplementary control for the VSG, based on virtual impedance, is proposed to reduce the output voltage error. However, the output voltages are not balanced, which is caused by the limitations of the converter topology. Paper [36] applies a four-leg converter to VSG. An adaptive PR control method is proposed as the inner control loop of VSG. However, the research is limited, as the controller and power process design are based on load balance. Although the control method is improved, it cannot output balanced voltages and stable frequency. Moreover, the influence of virtual impedance and parameters on VSG is not considered [38]. Hence, a deep study is carried out in this paper. The key contributions are summarized as follows:

(1): An improved VSG control strategy for a four-leg inverter is proposed. The improved virtual impedance control and power calculation method are used to keep the output voltages symmetrical and stable in the case of load symmetry. The results show that the voltage unbalance ratio can be reduced by 89%.
(2): A pre-synchronization control strategy is put forward. The control loops for voltage amplitude and phase are developed according to the proposed VSG control strategy. Results indicate that the difference in amplitude and phase angle between the inverter output voltages and the grid voltage decreases.
(3): An optimized design method for control parameters is presented. Considering the stability margins, the parameters of the voltage and current control loop are independently optimized to obtain faster dynamic performance. From the experimental results, the response time can be shortened by 50%.

The rest of this paper is organized as follows. In Section 2, a mathematical model of a three-phase four-leg inverter is derived. In Section 3, an improved VSG control strategy for four-leg inverter is proposed. In Section 4, a pre-synchronization control strategy of the proposed VSG is designed. In Section 5, an optimized control parameters design method is presented. Simulation and experimental validations are detailed in Section 6 and Section 7, respectively, while the conclusions are summarized in Section 8.

2. Mathematical Model of Four-Leg Inverter

A diagram of an unbalanced load power supply system is shown in Figure 1 [39]. In practical power supply systems, load imbalance is frequently encountered due to single-phase loads or unbalanced three-phase loads. To obtain symmetrical voltages and stable frequency for power supply and pre-synchronization, the DC/AC inverter shown in Figure 1 can be used as a four-leg inverter. It is assumed that the load is linear and time-invariant.

The topology of a three-phase four-leg inverter is shown in Figure 2 [23]. Three legs (a, b, c) of the inverter are linked to the three-phase AC loads via an LC filter. The inductance and capacitance are L_f and C_f, respectively. The fourth leg (G) is linked to the neutral point (n) via an inductor L_n. U_dc is the DC voltage source, which commonly comes from energy storage or distributed generation. Constraints on the DC side of the inverter are not considered. Thus, U_dc is considered as a constant value in this paper.

Since the switching frequency is much higher than the fundamental frequency, the average model of the four-leg inverter can be represented as shown in Figure 3 [23]. The averaged voltages, u_AG, u_BG, and u_CG, are expressed as follows:

[\begin{matrix} u_{A G} \\ u_{B G} \\ u_{C G} \end{matrix}] = [\begin{matrix} u_{A} - u_{G} \\ u_{B} - u_{G} \\ u_{C} - u_{G} \end{matrix}] = U_{d c} [\begin{matrix} d_{a} - d_{g} \\ d_{b} - d_{g} \\ d_{c} - d_{g} \end{matrix}]

(1)

where u_A, u_B, u_C, and u_G are the voltages relative to the negative terminal on the DC side. d_a, d_b, d_c, and d_g, denote the duty cycles of each upper arm switch.

Based on Kirchhoff’s law and Figure 3, the relationships of voltages and currents can be expressed as follows:

[\begin{matrix} u_{AG} \\ u_{BG} \\ u_{CG} \end{matrix}] = L_{f} \frac{d}{d t} [\begin{matrix} i_{La} \\ i_{Lb} \\ i_{Lc} \end{matrix}] + [\begin{matrix} u_{an} \\ u_{bn} \\ u_{cn} \end{matrix}] - L_{n} \frac{d}{d t} [\begin{matrix} i_{n} \\ i_{n} \\ i_{n} \end{matrix}]

(2)

i_{La} + i_{Lb} + i_{Lc} + i_{n} = 0

(3)

[\begin{matrix} i_{La} \\ i_{Lb} \\ i_{Lc} \end{matrix}] = C_{f} \frac{d}{d t} [\begin{matrix} u_{an} \\ u_{bn} \\ u_{cn} \end{matrix}] + [\begin{matrix} i_{a} \\ i_{b} \\ i_{c} \end{matrix}]

(4)

where, u_AG, u_BG, and u_C_G are arm voltages relative to the fourth leg (G). i_La, i_Lb, and i_Lc represent the filter inductor current. i_a, i_b, and i_c denote load currents. u_an, u_bn, and u_cn denote the load voltages.

According to Equations (2)–(4), the equation can be rewritten as follows:

\frac{d}{d t} [\begin{matrix} i_{La} \\ i_{Lb} \\ i_{Lc} \end{matrix}] = H^{- 1} [\begin{matrix} u_{AG} - u_{an} \\ u_{BG} - u_{bn} \\ u_{CG} - u_{cn} \end{matrix}]

(5)

\frac{d}{d t} [\begin{matrix} u_{an} \\ u_{bn} \\ u_{cn} \end{matrix}] = \frac{1}{C_{f}} [\begin{matrix} i_{La} - i_{a} \\ i_{La} - i_{b} \\ i_{La} - i_{c} \end{matrix}]

(6)

where

H = [\begin{matrix} L_{f} + L_{n} & L_{n} & L_{n} \\ L_{n} & L_{f} + L_{n} & L_{n} \\ L_{n} & L_{n} & L_{f} + L_{n} \end{matrix}]

(7)

According to Equations (5) and (7), it is clear that there is coupling in the three phases due to L_n. In order to eliminate the coupling, Clark transformation has been used to implement the transformation from abc to αβγ. The transformation matrix used can be defined as follows:

T = \frac{2}{3} [\begin{matrix} 1 & - 1 / 2 & - 1 / 2 \\ 0 & \sqrt{3} / 2 & - \sqrt{3} / 2 \\ 1 / 2 & 1 / 2 & 1 / 2 \end{matrix}]

(8)

Multiply both sides of Equation (5) by Equation (8) [34]. The following equation can be obtained:

\frac{d}{d t} [\begin{matrix} i_{L α} \\ i_{L β} \\ i_{L γ} \end{matrix}] = [\begin{matrix} 1 / L_{f} & 0 & 0 \\ 0 & 1 / L_{f} & 0 \\ 0 & 0 & 1 / L_{f} + 3 L_{n} \end{matrix}] [\begin{matrix} u_{α G} - u_{α n} \\ u_{β G} - u_{β n} \\ u_{γ G} - u_{γ n} \end{matrix}]

(9)

Similarly, the transformation of Equation (6) results in the following:

\frac{d}{d t} [\begin{matrix} u_{α n} \\ u_{β n} \\ u_{γ n} \end{matrix}] = \frac{1}{C_{f}} [\begin{matrix} i_{L α} - i_{α} \\ i_{L β} - i_{β} \\ i_{L γ} - i_{γ} \end{matrix}]

(10)

where [ u_α_G, u_β_G, u_γ_G]^T and [ u_α_n, u_β_n, u_γ_n]^T are the arm voltages relative to the fourth leg (G) and voltages of loads in the αβγ reference frame. [i_Lα, i_L_β, i_L_γ]^T and [ i_α, i_β, i_γ]^T denote the currents of inductor and load in the αβγ reference frame.

Based on Equations (9) and (10), the equivalent mathematical models of the α, β, and γ components are symmetrical. It is evident that there is no coupling among the α, β, and γ components. Therefore, the controllers of the α, β, and γ components can be designed separately.

3. Improved VSG Control Strategy for a Four-Leg Inverter

3.1. Problems in the Existing Control Strategy

Figure 4 illustrates the diagram of the existing control strategy for a four-leg inverter under load variation. According to [40,41], the existing power control of VSG can be described as follows:

J ω_{n} \frac{d ω}{d t} = P_{ref} - P_{e} - D_{1} ω_{n} (ω - ω_{n})

(11)

E_{m} = \frac{1}{K s} (Q_{ref} - Q_{e} + D_{2} (U_{ref} - U_{m}))

(12)

where P_ref and P_e denote the reference active power and the calculated active power at point of common coupling (PCC) points, respectively. Similarly, Q_ref and Q_e are reactive power. J and D₁ represent the virtual inertia constant and damping coefficient, respectively. D₂ and K represent the voltage regulation coefficient and integral regulation coefficient, respectively. ω_n denotes the reference angular frequency. ω is the angular frequency of VSG output. E_m denotes the magnitude of internal electric potential of VSG, and U_ref and U_m are the reference and measurement of voltage magnitude, respectively.

In general, virtual impedance is introduced to enhance the performance of VSG. The reference of VSG output voltage can be obtained as follows [38,42]:

u_{refabc} = e_{m} - i_{abc} Z_{v}

(13)

The problems of the existing control strategy are also presented in Figure 5. When the loads are balanced, the voltages are balanced, and the frequency has no ripple. However, the voltage asymmetry and frequency ripples appear due to load asymmetry, which is challenging for power supply and pre-synchronization. Thus, the existing control strategy need to be improved to suppress the voltage unbalance and frequency ripples.

3.2. Improved VSG Control Strategy

3.2.1. Improved Virtual Impedance Method

Assuming that the load is linear, according to Figure 2, the following equation can be obtained:

[\begin{matrix} u_{an} \\ u_{bn} \\ u_{cn} \end{matrix}] = [\begin{matrix} Z_{a} & 0 & 0 \\ 0 & Z_{b} & 0 \\ 0 & 0 & Z_{c} \end{matrix}] [\begin{matrix} i_{a} \\ i_{b} \\ i_{c} \end{matrix}]

(14)

where u_an, u_bn, and u_cn are load voltage, and i_a, i_b, and i_c represent load current. Z_a, Z_b, and Z_c denote the impedances of the load.

Take phase A as a reference. Based on the symmetrical component method [43], Equation (14) can be transformed into the following Equation (15):

[\begin{matrix} u_{an}^{+} \\ u_{an}^{-} \\ u_{an}^{0} \end{matrix}] = M [\begin{matrix} Z_{a} & 0 & 0 \\ 0 & Z_{b} & 0 \\ 0 & 0 & Z_{c} \end{matrix}] M^{- 1} [\begin{matrix} i_{a}^{+} \\ i_{a}^{-} \\ i_{a}^{0} \end{matrix}]

(15)

where

M = \frac{1}{3} \cdot [\begin{matrix} 1 & a & a^{2} \\ 1 & a^{2} & a \\ 1 & 1 & 1 \end{matrix}]

(16)

where a = e^j120°, and a² = e ^j240°.

u_{an}^{+}

u_{an}^{-}

u_{an}^{0}

are the sequence components of u_an, u_bn, and u_cn.

i_{a}^{+}

i_{a}^{-}

and

i_{a}^{0}

represent the sequence components of i_a, i_b, i_c.

Equation (15) can be rewritten as follows:

[\begin{matrix} u_{an}^{+} \\ u_{an}^{-} \\ u_{an}^{0} \end{matrix}] = [\begin{matrix} Z_{a_pp} & Z_{a_pn} & Z_{a_p 0} \\ Z_{a_np} & Z_{a_nn} & Z_{a_n 0} \\ Z_{a_0 p} & Z_{a_0 n} & Z_{a_00} \end{matrix}] [\begin{matrix} i_{a}^{+} \\ i_{a}^{-} \\ i_{a}^{0} \end{matrix}]

(17)

where Z_{a_pp}, Z_{a_nn}, and Z_{a_00} are the sequence components of load impedances, respectively. Z_{a_ij} is the coupling impedance between sequence i and sequence j.

Similarly, Equation (13) can be transformed into Equation (18).

[\begin{matrix} e_{ma}^{+} - u_{an}^{+} \\ e_{ma}^{-} - u_{an}^{-} \\ e_{ma}^{0} - u_{an}^{0} \end{matrix}] = [\begin{matrix} Z_{v}^{+} & 0 & 0 \\ 0 & Z_{v}^{-} & 0 \\ 0 & 0 & Z_{v}^{0} \end{matrix}] [\begin{matrix} i_{a}^{+} \\ i_{a}^{-} \\ i_{a}^{0} \end{matrix}]

(18)

where

e_{ma}^{+}

e_{ma}^{-}

, and

e_{ma}^{0}

are the sequence components of e_m.

Z_{v}^{+}

Z_{v}^{-}

, and

Z_{v}^{0}

are the sequence components of Z_v.

Basically,

e_{ma}^{-}

and

e_{ma}^{0}

are zero. According to (17) and (18), an equivalent sequential network model of VSG with an unbalanced load is represented in Figure 6. The impedances are coupled due to the unbalanced loads. Thus,

u_{an}^{+}

u_{an}^{-}

, and

u_{an}^{0}

and

i_{a}^{+}

i_{a}^{-}

, and

i_{a}^{0}

are coupled. The coupling relationship is represented by the controllable voltage source.

According to Figure 6, the positive sequence current and coupling impedances result in the formation of negative and zero sequence controllable voltage sources. Then, negative sequence and zero sequence currents are generated.

u_{an}^{-}

and

u_{an}^{0}

(

u_{an}^{-}

= −

i_{a}^{-}

Z_{v}^{-}

u_{an}^{0}

= −

i_{a}^{0}

Z_{v}^{0}

) are produced, which results in three-phase voltage unbalance at PCC points.

The improved virtual impedance is proposed based on Equation (18) and Figure 6. If

Z_{v}^{-}

and

Z_{v}^{0}

are zero, the negative sequence voltage and zero sequence voltage of the loads at PCC points are eliminated. Therefore, the improved virtual impedance can be utilized to mitigate voltage imbalance.

3.2.2. Power Calculation Method

When the load voltages are balanced, u_an, u_bn, and u_cn can be expressed as follows:

[\begin{matrix} u_{an} \\ u_{bn} \\ u_{cn} \end{matrix}] = [\begin{matrix} \sqrt{2} U \cos (ω t) \\ \sqrt{2} U \cos (ω t - 2 π / 3) \\ \sqrt{2} U \cos (ω t + 2 π / 3) \end{matrix}]

(19)

where U is the RMS value of the load voltage.

Due to the load imbalance, the currents can be expressed as follows:

\begin{array}{l} [\begin{matrix} i_{a}^{+} \\ i_{b}^{+} \\ i_{c}^{+} \end{matrix}] = [\begin{matrix} \sqrt{2} I^{+} \cos (ω t + φ_{i}^{+}) \\ \sqrt{2} I^{+} \cos (ω t + φ_{i}^{+} - 2 π / 3) \\ \sqrt{2} I^{+} \cos (ω t + φ_{i}^{+} + 2 π / 3) \end{matrix}] \\ [\begin{matrix} i_{a}^{-} \\ i_{b}^{-} \\ i_{c}^{-} \end{matrix}] = [\begin{matrix} \sqrt{2} I^{-} \cos (ω t + φ_{i}^{-}) \\ \sqrt{2} I^{-} \cos (ω t + φ_{i}^{-} + 2 π / 3) \\ \sqrt{2} I^{-} \cos (ω t + φ_{i}^{-} - 2 π / 3) \end{matrix}] \\ i_{a}^{0} = i_{b}^{0} = i_{c}^{0} = \sqrt{2} I^{0} \cos (ω t + φ_{i}^{0}) \end{array}

(20)

where I⁺, I⁻, and I⁰ are the RMS value of

i_{a}^{+}

i_{a}^{-}

, and

i_{a}^{0}

φ_{i}^{+}

φ_{i}^{-}

, and

φ_{i}^{0}

are the initial phase angles of the sequence currents.

Based on [44], the equation of active power can be rewritten as follows:

p = u_{an} i_{a} + u_{bn} i_{b} + u_{cn} i_{c}

(21)

According to Equations (19)–(21), the following equation can be obtained:

p = \bar{p} + \tilde{p} = 3 U I^{+} \cos φ_{i}^{+} + 3 U I^{-} \cos (2 ω t + φ_{i}^{-})

(22)

where

\bar{p}

represents average power, and

\tilde{p}

is the oscillating power, which is the main cause of the power ripple.

According to Laplace transform, Equation (11) can be rewritten as follows:

ω (s) = \frac{(P_{ref} - P_{e} (s)) / ω_{n} + D_{1} ω_{n}}{J s + D_{1}}

(23)

Based on Equations (22) and (23), the angular frequency in the frequency domain can be expressed as follows:

ω (j 0) = \frac{(P_{ref} - P_{e}) / ω_{n} + D_{1} ω_{n}}{D_{1}}

(24)

ω (j 2 ω) = \frac{(0 - P_{e} (j 2 ω)) / ω_{n}}{J j 2 ω + D_{1}}

(25)

According to Equations (24) and (25), the angular frequency includes both a DC component and a double-frequency component. If P_ref is equal to P_e at steady state, the DC component of ω is ω_n. The oscillating active power can be represented by P_mcosφ_i⁻ + jP_msinφ_i⁻, where P_m is the RMS of the oscillating power. The double-frequency gain of the angular frequency can be expressed as follows:

|ω (j 2 ω)| = \frac{P_{m}}{100 π \sqrt{D_{1}^{2} + 40000 π^{2} J^{2}}}

(26)

When the oscillating active power increases, the ripple of the voltage frequency will exceed the allowable range. This will endanger the normal operation of the system. It can also be proved that reactive power ripple has an impact on VSG control through similar methods. However, it is not covered in the article.

According to Equations (22)–(26), the power calculation method is presented. If VSG outputs are balanced voltages, there will be active power ripples. The oscillating active power will cause a frequency ripple. Therefore, the average active power is used as feedback for the improved VSG control strategy.

3.2.3. Control Block Diagram

To address the voltage unbalance and voltage frequency ripple caused by unbalanced loads, an improved VSG control strategy is put forward. Figure 7 shows the improved VSG control block diagram.

Based on the derivation mathematical model of four-leg inverter in Section 2, Equations (9) and (10) can be obtained. It is evident that there is no coupling among the α, β, and γ components. What is more, the mathematical model of the four-leg inverter in the αβγ reference frame is similar to that of three phase voltage source converters with LC [45]. Therefore, the voltage and current control loop of four-leg inverter in Figure 7 can be derived.

Figure 7 depicts the control loops of the four-leg inverter in the αβγ reference frame. The current control loop is a proportional (P) controller, which takes the capacitive current as feedback. i_Cf denotes the capacitance current. A proportional-resonant (PR) controller is used in voltage control loop to achieve accurate voltage reference tracking.

G_d(s) represent the control delay of the digital system. G_ZOH(s) denote a zero-order holder, which is the characteristic of the modulation. G_d(s) and G_ZOH(s) can be expressed as follows:

\{\begin{cases} G_{d} (s) = e^{- s T s} \\ G_{ZOH} (s) = \frac{1 - e^{- s T s}}{s} \end{cases}

(27)

where T_s is the sampling period.

According to Section 3.2.1, it can be concluded that if the virtual impedances of negative and zero sequence are zero, the negative sequence voltage and zero sequence voltage of the loads at PCC points are eliminated. Therefore, an improved virtual impedance method is proposed, and the positive sequence of virtual impedance is integrated into the control. This can be expressed as follows:

u_{refabc} = e_{m} - i_{abc} Z_{v}^{+}

(28)

In addition, Section 3.2.2 analyzes the influence of power calculation in VSG control under an unbalanced load. It can be concluded that there is oscillating active power under an unbalanced load. The oscillating active power will cause a frequency ripple. Therefore, the average power is used as feedback for the improved VSG control strategy. Therefore, the following equation can be obtained:

\{\begin{cases} J ω_{n} \cdot d ω / d t = P_{ref} - {\bar{P}}_{e} - D_{1} ω_{n} (ω - ω_{n}) \\ E_{m} = (Q_{ref} - {\bar{Q}}_{e} + D_{2} (U_{ref} - U_{m})) / K s \end{cases}

(29)

where

{\bar{P}}_{e}

and

{\bar{Q}}_{e}

denote the average active and reactive power at PCC points, respectively. Z_v⁺ is the positive sequence virtual impedance.

In addition, a second order generalized integrator (SOGI) is presented to separate the positive and negative component, which can be rewritten as follows:

[\begin{matrix} i_{α}^{+} \\ i_{β}^{+} \end{matrix}] = \frac{1}{2} \cdot [\begin{matrix} 1 & - (- j) \\ - j & 1 \end{matrix}] [\begin{matrix} i_{α} \\ i_{β} \end{matrix}]

(30)

where j = e^j^π/2.

The feedback of active power can be expressed as follows:

{\bar{P}}_{e} = u_{an} i_{a}^{+} + u_{bn} i_{b}^{+} + u_{cn} i_{c}^{+}

(31)

where u_an, u_bn, and u_cn denote the load voltages at PCC points.

i_{a}^{+}

i_{b}^{+}

, and

i_{c}^{+}

represent the positive sequence currents flowing through the load.

4. Improved VSG Pre-Synchronization Control Strategy for a Four-Leg Inverter

4.1. Analysis of a VSG Control Strategy from Isolated Mode to Grid-Connected Mode under Unbalanced Loads

The four-leg inverter can be used as the connection between microgrid and power grid. It is capable of operating both in isolated mode and in grid-connected mode. In isolated mode, the four-leg inverter employing the VSG control strategy can be considered a voltage source. It can support the voltage and frequency for unbalanced loads, as detailed in Section 3. In grid-connected mode, the active and reactive power references can be accurately tracked. The frequency and voltage output by the inverter are consistent with the power grid. It can provide active and reactive support when the grid voltage and frequency drop.

In Figure 8, the inverter is linked to the power grid by the line impedance Z_Line. The VSG control strategy is employed in isolated mode. Thus, the voltage amplitude, frequency and phase output by inverter are different from the grid at the time of mode switching, which will result in a large current rush. If the grid is connected at this time, it will lead to a large impact current, which can easily cause accidents and component damage.

Three key conditions must be met for the inverter to transition from off-grid to grid-connected operation. First, the inverter’s output voltage amplitude must match that of the power grid. Second, the frequency of the voltage is consistent with that of the power grid. Third, the phase of output voltage is equal to the grid. However, it can be seen from Section 3 that the unbalanced voltages and frequency ripple are caused by unbalanced loads. Thus, the impulse current must exist when using traditional VSG control, because the above three conditions cannot be met. The improved VSG control strategy proposed in Section 3 makes it possible to have an inverter with seamless transfer. The improved VSG-based pre-synchronization control strategy for four-leg inverters requires further study.

4.2. Design of Improved VSG-Based Pre-Synchronization Control Strategy

Based on the pre-synchronization control strategy [46], the VSG-based pre-synchronization control strategy for a four-leg inverter is put forward in Figure 9. The phase pre-synchronization is designed according to the PLL and Park transformation. The amplitude and phase angle differences between the output voltages of inverter and the grid voltage are the result of the DC component. Therefore, the PI controller is designed to diminish the amplitude and phase angle difference between the output voltages of inverter and the grid voltage.

4.2.1. Phase Pre-Synchronization

The phase of power grid θ_g can be obtained by using a phase-locked loop (PLL). u_U, u_V, and u_W represent the voltages of the power grid. The schematic diagram of the PLL is displayed in Figure 10. According to Equation (8), the voltages of the power grid u_α, u_β can be obtained by Clark transformation. The voltages of power grid u_d, u_q can be calculated by Park transformation. The transformation matrix is expressed as follows:

F = [\begin{matrix} \cos θ_{g} & \sin θ_{g} & 0 \\ - \sin θ_{g} & \cos θ_{g} & 0 \\ 0 & 0 & 1 \end{matrix}]

(32)

where θ_g is the phase of power grid.

The proportional-integral (PI) controller is applied to make the u_q calculated by Park transformation equal to zero. The output angular frequency by the PI controller is added to ω_n to obtain the angular frequency of the grid. The output angular frequency from the PI controller is added to ω_n to produce the angular frequency of grid. The voltage phase of a power grid can be obtained by the integral of the angular frequency.

The voltages u_an, u_bn, and u_cn that are output by the four-leg inverter are transformed by Park transformation to obtain inverter voltage u_qn. The reference angle in Park transformation is the power grid angle θ_g. The u_qn is zero only when the phase of the grid aligns with the phase of the voltage output of the inverter. Therefore, the PI controller can be used to set u_qn to zero. The compensation of angular frequency Δω output by the PI controller is used to adjust the angular frequency of the four-leg inverter, with the goal of aligning the voltage frequency and phase with those of the power grid.

4.2.2. Amplitude Pre-Synchronization

Root mean square (RMS) is used to obtain the voltages U and U_g. U and U_g are the RMS voltages of the four-leg inverter and power grid, respectively. The PI controller is proposed to ensure that the voltage U output by the inverters matches the reference voltages of power grid U_g. The voltage compensation output by the PI controller is added to the internal electric potential of VSG, ensuring that the voltage output by the inverter matches the power grid voltage.

5. Optimized Parameters Design Method

To enhance the dynamic performance of the voltage and current control loops, it is crucial to carefully design the controller parameters. According to [47,48], it can be known that the pole mode diagram is an important method for control analyses. However, at present, the Bode diagram and transfer function are commonly used to design control parameters. Until now, there are few papers using use pole to design control parameters. An optimized design method for control parameters is presented according to the pole map.

Considering that the controllers in the actual system are mostly discrete, the control shown in Figure 6 is designed in the z domain. Based on Equations (9) and (10), designing the controller in the αβγ reference frame yields equivalent results. Consequently, the controller is designed in the α axis. The main circuit parameters of the prototype are listed in Table 2.

5.1. Parameters Design for Current Control Loop

The dynamic performance is influenced by both the voltage and current control loops. The design of the current control loop can be performed independently from that of the voltage control loop. Pole mapping has been used to obtain the optimal parameter. The closer the dominant poles are to the origin of the unit circle, the quicker the dynamic response of the current control loop. From Figure 7, the open-loop and closed-loop transfer functions of the current control loop in z domain can be presented as follows:

G_{c o} (z) = \frac{k_{c} \sin (ω_{r} T_{s}) (z - 1)}{L_{f} ω_{r} z (z^{2} - 2 z \cos (ω_{r} T_{s}) + 1)}

(33)

G_{cc} (z) = \frac{G_{co} (z)}{1 + G_{co} (z)}

(34)

where T_s is the sampling period. k_c denotes the proportional parameter. ω_r denotes

1 / \sqrt{L_{f} C_{f}}

If the inductance and capacitance remain constant, the dynamic performance of the current control loop depends on the variable parameter k_c. Figure 11 shows the pole map of the closed-loop transfer function as k_c varies. As k_c increases from 1 to 16, a pair of conjugate poles initially approaches the original point before moving away from it. When k_c is 6.7, the dominant poles are closest to the original point, as determined by the traversal comparison. The accurate k_c, closest to the original point, can be calculated by a complex process. However, it is not meaningful. The parameter, obtained by traversal, has a better dynamic response.

For the stability analyses, the gain margin (GM) and phase margin (PM) are used to check the stability of the system, which can be obtained by Bode diagram or the open-loop transfer function. According to [49], it can be known that the generally accepted method of determining the stability margins is GM > 3 dB and PM > 30°.

If k_c can satisfy the requirement of stability margins, it is the optimized k_{c_O}. If the stability margins cannot be met, k_c needs to be increased or decreased to obtain k_{c_O}. After calculation, when k_c is 6.7, GM and PM are 8.18 dB and 37.6°, respectively, which meets the requirement of stability margins. Therefore, k_{c_O} is the optimized parameter on the α axis.

5.2. Parameters Design for Voltage Control Loop

The parameter design process of voltage control loop is similar to that of current control loop. The voltage controller used in this paper is a proportional-resonant (PR) controller, and the transfer functions of the voltage controller in the s domain can be expressed as follows:

G_{PR} (s) = k_{v} + \frac{k_{r} s}{s^{2} + ω_{n}^{2}}

(35)

where k_v represent the proportional parameters. k_r is the resonant parameters. ω_n is the reference angular frequency.

The pre-warped Tustin z transformation can be represented as follows:

s = \frac{ω_{i}}{\tan \frac{ω_{i} T_{s}}{2}} \cdot \frac{z - 1}{z + 1}

(36)

where, ω_i is frequency band where the error of the z transformation is reduced. In this paper, ω_i is ω_n.

According to Equations (34) and (35), the voltage controller in the z domain can be expressed as follows:

G_{PR} (z) = k_{v} + \frac{k_{r} \sin (ω_{n} T_{s}) (z^{2} - 1)}{2 ω_{n} (z^{2} - 2 z \cos (ω_{n} T_{s}) + 1)}

(37)

To streamline the voltage control loop design, the P component can be excluded. The R controller is used to enhance system performance. According to Figure 7, the open-loop and closed-loop transfer functions in z domain can be expressed as follows:

G_{vo} (z) = G_{R} (z) \times \frac{k_{c} (1 - \cos (ω_{r} T_{s})) (z + 1)}{z (z^{2} - 2 z \cos (ω_{r} T_{s}) + 1) + k_{c} \sin (ω_{r} T_{s}) (z - 1) / (L_{f} ω_{r})}

(38)

G_{cc} (z) = \frac{G_{vo} (z)}{1 + G_{vo} (z)}

(39)

Since only one parameter of the PR controller needs to be designed, the pole map of the voltage control loop can also be used to design the optimized parameter.

Figure 12 shows the pole map of the voltage control loop as k_r varies. The pole map of the voltage control loop varying with k_r is shown in Figure 12. As k_r increases, a pair of conjugate poles first approaches the original point and then moves away. When k_r is 190, the dominant poles are closest to the original point, as determined by traversal comparison.

If k_r can satisfy the requirement of stability margins, it is the optimized k_{r_O}. The generally accepted method of determining the stability margins is GM > 3 dB and PM > 30°. If the stability margins cannot be met, k_r needs to be increased or decreased to obtain k_{r_O}. When k_c is 190, GM and PM are 8.47 dB and 62.5°, which meet the requirement of the stability margins. Thus, k_{r_O} is the optimized parameter on the α axis.

Based on Equations (9) and (10), the voltage and current control loops on the α axis are the same as that on the β axis. However, due to the neutral inductance, the equivalent filter inductance is L_f+3L_n on the γ axis. The above calculation method is used to obtain the optimized parameters. When k_{c_O}_γ is 13.8, GM and PM are 10.7 dB and 52.9°, respectively. When k_{r_O}_γ is designed as 40, GM and PM are calculated as 13.9 dB and 67.5°, respectively. The controller parameters meet the requirements of the stability margins.

6. Simulation Verifications

In this section, the simulation is carried out in MATLAB/Simulink. The simulation model of the main circuit and proposed control strategy is shown in Figure 13 [39]. The proposed improved VSG-based control strategy and pre-synchronization method of a four-leg inverter can be verified by the simulation results. The parameters of the simulation are shown in Table 3.

The three-phase loads are set to 8 kW, 4 kW, and 1 kW for phases a, b, and c, respectively. The simulation results with different inverter and VSG controls are shown in Figure 14.

In Figure 14a, the neutral point is not grounded. When using traditional VSG for a conventional inverter, the phase voltages are seriously asymmetrical. The total harmonic distortion (THD) of output voltages is 2.6%. Figure 14b shows the simulation results of traditional VSG for a four-leg inverter. Compared with Figure 14a, the voltages are slightly asymmetrical. In this case, The THD of output voltages is 0.99%. However, in Figure 14c, with improved VSG for four-leg converter, the output voltages in PCC points are almost symmetrical. The THD is reduced to 0.85%. The proposed improved control strategy can be verified by the traditional converter and control method.

In Figure 15, the simulation results of the power grid voltage and four-leg converter voltage under pre-synchronization control are shown. At this time, the three-phase loads of a, b, and c are also 8 kW, 4 kW, and 1 kW, respectively. The voltages of phase A are shown in Figure 15. As the pre-synchronization control strategy works, the phase and amplitude of power grid voltage are rapidly consistent with the four-leg converter voltage. The difference in amplitude and phase angle between the output voltages of the converter and the grid voltage has decreased.

7. Experimental Verifications

A down-scaled prototype of a four-leg inverter is built for experimental verification. The photograph is shown in Figure 16. The primary side of the experimental setup contains a DC source, AC grid, and the main circuit. The DC source is an ITECH 6018C-1500-40, which provides DC power for the entire system. The AC grid is a grid simulator IT7930-350-180, which can output changed AC voltage. The verifications of the improved VSG pre-synchronization control strategy can be carried out conveniently through it. The main circuit includes an IGBT-based four-leg inverter, LC filter, and AC load. The secondary side of the experimental setup includes the controller and scope. The controller is a digital signal process (DSP)-integrated board. It is produced by a Chinese manufacturer and is named Yxspace SP6000. The control chip of it is a DSP TMS320C6747. The oscilloscope is Tektronix-MOS54. It has four sampling channels, and the sampling rate of it is 6.25 GS/s, which is helpful for observing the actual voltage and current waveforms.

To make the hardware connection clearer, a single-line diagram of the experimental setup is shown in Figure 17. The single-line diagram of the experimental setup is divided into two parts. The first part represents the main power circuit. The other part is the control circuit and sampling circuit. The main power circuit includes a DC source, IGBT-based four-leg inverter, LC filter, AC load, and AC grid. The connections between them are shown in Figure 17. Two types of Hall current sensors are used in the sampling circuit to obtain voltage and current signals. The voltage sensor is a CHV-25P, which can measure AC voltage and DC voltage in isolation. The current sensor is an LA-50P, which also can be used to obtain AC or DC current signals. The control circuit is a digital signal process (DSP)-integrated board, through which the output PWM signal and input sampling signal can be obtained. The control chip of it is a DSP TMS320C6747.

Table 4 shows the parameters of the main circuit. In the experimental verification, the virtual inertia J is set to 0.5, the damping coefficient D₁ is 30, and the virtual impedance Z_v is 3 mH. The voltage regulation coefficient D₂ is 321. The controller parameters used in the experiments are presented in Table 4, which are designed by the conventional and proposed method.

7.1. Verifications of Improved VSG Control Strategy

The three-phase loads of a, b, and c are set as 7.5 Ω, 15 Ω, and 30 Ω, respectively. The optimized parameters shown in Table 4 are also used. The experimental results are shown in Figure 18 and Figure 19. It is worth noting that the conventional converter is usually composed of six switches. There are three phases, and each phase has two switches.

Figure 18a,b present the steady-state waveforms of the traditional VSG applied to a conventional inverter [40]. The neutral point is not grounded. According to the standard equation of the unbalance ratio, the negative sequence unbalance ratio of voltage is 18.2%. Figure 18c,d show the waveforms of a traditional VSG [38] for a four-leg inverter. The negative sequence unbalance ratio of voltage is 2.4%. However, the requirement of negative sequence voltage unbalance is less than 2%. The above two strategies cannot meet the requirement. Figure 18e,f display the waveforms for the improved VSG control strategy applied to the four-leg inverter, with a negative sequence voltage unbalance ratio of 0.26%.

Two strategies are used in the four-leg inverter. When the system is started, the frequency waveforms are shown in Figure 19. Compared with traditional control strategy, it is obvious that the frequency ripple is suppressed by adopting the improved VSG control. In conclusion, the proposed VSG control strategy effectively maintains frequency stability under unbalanced load conditions.

When the system runs at the rated state, the loads are all 10 Ω. The active power of phase A is increased by 180 W. The waveforms are shown in Figure 20. The three-phase voltages remain basically unchanged when the unbalanced load is turned on.

7.2. Verifications of Improved VSG Pre-Synchronization Control Strategy

The phase voltage of the power grid is set to 60 V. Table 2 shows that the rated phase voltage of the four-leg inverter is 60 V. It can be concluded that the symmetrical voltages can be obtained under unbalanced loads, as in Section 7.1. Thus, the loads are all 10 Ω.

The waveforms of the power grid voltage and four-leg converter voltage are shown in Figure 21. The voltages of phase A are used as references. When the pre-synchronization control strategy is added, the phase and amplitude of the power grid voltage are rapidly consistent with four-leg converter voltage. The errors of amplitude are caused by sampling error, device parameter errors, and energy loss.

Figure 22 shows the pre-synchronization process waveforms. Δθ denotes the phase difference between the grid and inverter output voltages, while Δω represents the difference in their angular frequencies. ΔU₁ is the difference in RMS. P denotes the active power output of the four-leg inverter. Before 0.5 s, the output voltage and active power basically follow their references. Pre-synchronization control is introduced at 0.5 s, reducing the phase angle difference between the inverter’s output voltages and the grid voltage. Within 0.1 s, the inverter’s output voltage aligns closely with the grid voltage, and the voltage and active power fluctuations remain within acceptable limits.

7.3. Verifications of Optimized Parameters Design Method

Table 4 presents three parameters used to validate the proposed design method. The initial voltage is 60 V, and the loads are all 10 Ω. The response time, defined as the duration from initiation to reaching 95% of the steady state, is proposed to evaluate the control system’s dynamic performance. The response time of establishing voltage is compared when the system is started. Take phase A as an example. Figure 22 and Figure 23 display the experimental waveforms.

Figure 23a illustrates the waveforms with parameters I. In this case, the response time is 160 ms. Figure 23b shows the results with parameters II. It can be seen that the response time is 60 ms. The results of the proposed optimized parameters are shown in Figure 23c. The response time is 30 ms, which takes half as long as traditional methods. The effectiveness of the optimized parameters design method is verified.

The active power waveforms are shown in Figure 24. With the proposed optimized parameters, the active power reference is reached first. When parameters I and II are applied in the control loops, the system takes a considerable amount of time to achieve the steady state, significantly impacting its performance.

8. Conclusions

A VSG-based control strategy and pre-synchronization method for a four-leg inverter under an unbalanced load is put forward in this paper. An improved VSG control strategy for a four-leg inverter is put forward. The positive sequence virtual impedance and current are integrated into the control loops for the suppression of voltage asymmetry and frequency ripples. The experiment results show that the voltage unbalance ratio can be reduced by 89%. Furthermore, based on the proposed improved VSG control strategy, a pre-synchronization control strategy is put forward. The pre-synchronization of the voltage amplitude and phase are integrated into the proposed VSG control loop. The results show that the output voltage of the inverter is rapidly synchronized with the power grid voltage.

In addition, an optimized design method for control parameters is presented. The parameters of the voltage control loop and current control loop can be optimized independently. The dynamic performance is improved with satisfying stability margins. From the experimental comparisons, the response time can be shortened by 50%.

Author Contributions

Conceptualization, Z.H. and Z.L.; Methodology, Z.H. and Z.L.; Software, Z.H. and Y.S.; Validation, Z.H., Y.S. and B.S.; Investigation, Z.H. and K.L.; Writing—original draft, Z.H. and G.S.; Writing—review and editing, Z.L., G.S. and K.L.; Supervision, G.S. and K.L.; Funding acquisition, Z.L. and K.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Natural Science Foundation of China under Grant 52207212 & U2166202; Natural Science Foundation of Shandong Province under Grant ZR2021QE158.

Data Availability Statement

No new data were created or analyzed in this study.

Conflicts of Interest

The authors declare no conflicts of interest.

Nomenclature

Abbreviations
VSG	Virtual synchronous generator.
PSO	Particle swarm optimization.
PWM	Pulse width modulation.
MPC	Model predictive control.
3D-SVM	Three-dimensional space vector modulation.
PI	Proportional-integral.
PR	Proportional-resonant.
PCC	Point of common coupling.
P	Proportional.
RMS	Root mean square.
SOGI	Second order generalized integrator.
GM	Gain margin.
PM	Phase margin.
PLL	Phase-locked loop.
THD	Total harmonic distortion.
Parameters
L_f, L_n	Inductor of LC filter, neutral inductor.
C_f	Capacitor of LC filter.
U_dc	Voltage at the DC side of the four-leg inverter.
u_A, u_B, u_C, u_G	Arm voltages relative to the negative terminal on the DC side.
u_AG, u_BG, u_CG	Arm voltages relative to the fourth leg (G).
d_a, d_b, d_c, d_g	Duty cycles of each upper arm switch.
u_an, u_bn, u_cn	Load voltages.
i_La, i_Lb, i_Lc	Currents of the filter inductor.
i_a, i_b, i_c	Currents of the loads.
i_n	Currents of the neutral inductor.
u_α_G, u_β_G, u_γ_G	Arm voltages relative to the fourth leg (G) in the αβγ reference frame.
u_α_n, u_β_n, u_γ_n	Load voltages in the αβγ reference frame.
i_Lα, i_L_β, i_L_γ	Filter currents inductor in the αβγ reference frame.
i_α, i_β, i_γ	Load currents of the in the αβγ reference frame.
P_ref, Q_ref	Reference active power and reactive power at PCC points.
P_e, Q_e	Calculated active power and reactive power at PCC points.
D₁	Damping coefficient.
D₂	Voltage regulation coefficient.
J	Virtual inertia constant.
K	Integral regulation coefficient.
ω_n, ω	Reference angular frequency and output angular frequency.
e_m	Internal electric potential of VSG.
E_m	Magnitude of e_m.
U_ref, U_m	Magnitude voltages of the output reference and measurement.
Z_v	Virtual impedance of VSG.
u_refabc	Reference of u_an, u_bn, u_cn.
u_refαβγ	Reference of u_an, u_bn, u_cn in the αβγ reference frame.
i_abc	Three-phase currents of the loads.
I, U	RMS of i_a, i_b, i_c, RMS of u_an, u_bn, u_cn.
Z_a, Z_b, Z_c	Impedances of the load.
$u_{an}^{+}$ $, u_{an}^{-}$ $, u_{an}^{0}$	Sequence components of u_an, u_bn, u_cn.
$i_{a}^{+}$ $, i_{a}^{-}$ $, i_{a}^{0}$	Sequence components of i_a, i_b, i_c.
Z_{a_pp}, Z_{a_nn}, Z_{a_00}	Sequence components of Z_a, Z_b, Z_c.
Z_{a_ij}	Coupling impedance between sequence i and sequence j of Z_a, Z_b, Z_c.
$e_{ma}^{+}$ $, e_{ma}^{-}$ $, e_{ma}^{0}$	Sequence components of e_m.
$Z_{v}^{+}$ $, Z_{v}^{-}$ $, Z_{v}^{0}$	Sequence components of Z_v.
P_m	RMS of oscillating power at PCC points.
${\bar{P}}_{e}$ $, {\bar{Q}}_{e}$	Average active and reactive power at PCC points.
T_s	Sampling period.
Z_Line	Line impedance.
u_U, u_V, u_W	Voltages of power grid.
u_α, u_β	Voltages of power grid in the αβγ reference frame.
u_d, u_q	Voltages of power grid in the dq reference frame.
θ_g	Voltage phase of the power grid.
u_qn	u_an, u_bn, u_cn in the dq reference frame.
Δω	Difference phase between the voltages of grid and converter output.
U_g	RMS of u_U, u_V, u_W.
ω_r	$1 / \sqrt{L_{f} C_{f}}$
ω_i	Frequency band where the error of z transformation is reduced.
k_c	Proportional parameter of current control loop.
k_{c_O}	Optimized parameter of the current control loop on the α and β axis.
k_{c_O}_γ	Optimized parameter of the current control loop on the γ axis.
k_v, k_r	Proportional and resonant parameters of voltage control loop.
k_{r_O}	Optimized parameter of the voltage control loop on the α and β axis.
k_{r_O}_γ	Optimized parameter of the voltage control loop on the γ axis.

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Figure 1. Diagram of unbalanced load power supply system.

Figure 2. Topology of the three phase four-leg converter.

Figure 3. Average model of the four-leg inverter.

Figure 4. Diagram of the existing VSG control strategy for a four-leg inverter.

Figure 5. Problems of the existing control strategy under load variation.

Figure 6. Equivalent sequential network model of VSG with an unbalanced load.

Figure 7. Improved VSG control block diagram.

Figure 8. Diagram of a four-leg inverter transitioning from off-grid to grid-connected operation.

Figure 9. Improved VSG pre-synchronization control block diagram.

Figure 10. Schematic diagram of a PLL.

Figure 11. Pole map of the current control loop with varying k_c.

Figure 12. Pole map of the voltage control loop with varying k_r.

Figure 13. Simulation model of the main circuit and proposed control strategy.

Figure 14. Simulation results with an unbalanced load. (a) Traditional VSG for a conventional converter [40]; (b) traditional VSG [38] for a four-leg converter; (c) improved VSG for a four-leg converter.

Figure 15. Simulation results of voltages of the power grid and four-leg converter under pre-synchronization control.

Figure 16. Photograph of a down-scaled prototype of the four-leg inverter.

Figure 17. Single-line diagram of the experimental setup.

Figure 18. Steady-state waveforms with an unbalanced load. (a) Voltages of a traditional VSG for a conventional inverter; (b) currents of a traditional VSG for a conventional inverter; (c) voltages of a traditional VSG for a four-leg inverter; (d) currents of a traditional VSG for a four-leg inverter; (e) voltages of an improved VSG for a four-leg inverter; (f) currents of an improved VSG for a four-leg inverter.

Figure 19. Waveforms of frequency with an unbalanced load.

Figure 20. Waveforms under load being turned on.

Figure 21. Waveforms of voltages of the power grid and four-leg converter.

Figure 22. Waveforms of the pre-synchronization process.

Figure 23. Waveforms under the system turned on with different control parameters. (a) Parameters I; (b) parameters II; (c) proposed optimized parameters.

Figure 24. Active power waveforms under a system turned on with different control parameters.

Table 1. Comparison of different control strategies for a four-leg inverter.

Control Strategies	Implementation Process	Dynamic Performance	Voltages Unbalance Ratio	Affected by Mismatch	Can Provide Inertia and Damping
[29,30]	Easy	Low	Low	Low	No
[31,32,33,34,35]	Complex	High	Low	Medium	No
[36]	Easy	Low	High	Low	Yes
Proposed method	Easy	Medium	Low	Low	Yes

Table 2. Parameters of the main circuit.

Parameters	Value
Rated phase voltage (RMS value) U_m	60 V
Rated phase current I	6 A
DC-side voltage U_dc	200 V
Filter inductance L_f	2 mH
Neutral inductance L_n	1 mH
Filter capacitance C_f	30 μF
Fundamental frequency f_n	50 Hz
Sampling period T_s	0.0001 s
Switching frequency f_PWM	10 kHz

Table 3. Parameters of the simulation.

Parameters	Value
Rated power	13 kW
Rated phase voltage (RMS value) U_m	220 V
DC-side voltage U_dc	750 V
Filter inductance L_f	2.5 mH
Neutral inductance L_n	1.25 mH
Filter capacitance C_f	80 μF
Fundamental frequency f_n	50 Hz
Sampling period T_s	0.0001 s
Switching frequency f_PWM	10 kHz

Table 4. Parameters of the voltage and current control loop.

Items	Parameters I	Parameters II	Optimized Parameters
Parameters on the αβ axis	k_c = 5	k_c = 7.8	k_c = 6.7
	k_v = 0.05	k_v = 0.04	k_v = 0
	k_r = 3	k_r = 10	k_r = 190
Parameters on the γ axis	k_c = 10	k_c = 14.6	k_c = 13.8
	k_v = 0.01	k_v = 0.02	k_v = 0
	k_r = 1	k_r = 2	k_r = 40

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Huang, Z.; Liu, Z.; Shen, G.; Li, K.; Song, Y.; Su, B. A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads. Symmetry 2024, 16, 1116. https://doi.org/10.3390/sym16091116

AMA Style

Huang Z, Liu Z, Shen G, Li K, Song Y, Su B. A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads. Symmetry. 2024; 16(9):1116. https://doi.org/10.3390/sym16091116

Chicago/Turabian Style

Huang, Zhenshan, Zhijie Liu, Gang Shen, Kejun Li, Yuanzong Song, and Baihe Su. 2024. "A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads" Symmetry 16, no. 9: 1116. https://doi.org/10.3390/sym16091116

APA Style

Huang, Z., Liu, Z., Shen, G., Li, K., Song, Y., & Su, B. (2024). A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads. Symmetry, 16(9), 1116. https://doi.org/10.3390/sym16091116

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A Virtual Synchronous Generator-Based Control Strategy and Pre-Synchronization Method for a Four-Leg Inverter under Unbalanced Loads

Abstract

1. Introduction

2. Mathematical Model of Four-Leg Inverter

3. Improved VSG Control Strategy for a Four-Leg Inverter

3.1. Problems in the Existing Control Strategy

3.2. Improved VSG Control Strategy

3.2.1. Improved Virtual Impedance Method

3.2.2. Power Calculation Method

3.2.3. Control Block Diagram

4. Improved VSG Pre-Synchronization Control Strategy for a Four-Leg Inverter

4.1. Analysis of a VSG Control Strategy from Isolated Mode to Grid-Connected Mode under Unbalanced Loads

4.2. Design of Improved VSG-Based Pre-Synchronization Control Strategy

4.2.1. Phase Pre-Synchronization

4.2.2. Amplitude Pre-Synchronization

5. Optimized Parameters Design Method

5.1. Parameters Design for Current Control Loop

5.2. Parameters Design for Voltage Control Loop

6. Simulation Verifications

7. Experimental Verifications

7.1. Verifications of Improved VSG Control Strategy

7.2. Verifications of Improved VSG Pre-Synchronization Control Strategy

7.3. Verifications of Optimized Parameters Design Method

8. Conclusions

Author Contributions

Funding

Data Availability Statement

Conflicts of Interest

Nomenclature

References

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