TM
MP2307 – 3A, 23V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
VOUT
VOUT
VIN
⎛
⎞
⎛
⎞
⎟
VOUT
VOUT
⎜
∆VOUT
=
× ⎜1−
⎟ ×RESR
IC1 = ILOAD
×
× 1−
⎜
⎟
⎜
⎝
⎟
⎠
fS ×L
V
V
⎝
⎠
IN
IN
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP2307 can be optimized for a wide range of
capacitance and ESR values.
The worst-case condition occurs at VIN = 2VOUT
,
where IC1 = ILOAD/2. For simplification, use an
input capacitor with a RMS current rating
greater than half of the maximum load current.
Compensation Components
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1µF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple for low ESR capacitors can
be estimated by:
MP2307 employs current mode control for easy
compensation and fast transient response. The
system stability and transient response are
controlled through the COMP pin. COMP is the
output of the internal transconductance error
amplifier.
A
series
capacitor-resistor
combination sets a pole-zero combination to
govern the characteristics of the control system.
The DC gain of the voltage feedback loop is
given by:
⎛
⎜
⎝
⎞
⎟
⎟
⎠
ILOAD
VOUT
VIN
VOUT
⎜
∆V
=
×
× 1−
IN
C1× fS
V
VFB
IN
AVDC = RLOAD × GCS × AEA
×
VOUT
Where C1 is the input capacitance value.
Where VFB is the feedback voltage (0.925V),
AVEA is the error amplifier voltage gain, GCS is
the current sense transconductance and RLOAD
is the load resistor value.
Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
preferred to keep the output voltage ripple low.
The output voltage ripple can be estimated by:
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of the error amplifier, and the
other is due to the output capacitor and the load
resistor. These poles are located at:
⎛
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
1
⎜
⎜
∆VOUT
=
× 1−
× RESR
+
fS × L
8 × fS × C2
GEA
fP1
=
Where C2 is the output capacitance value and
RESR is the equivalent series resistance (ESR)
value of the output capacitor.
2π× C3× AVEA
1
fP2
=
2π × C2× RLOAD
When using ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance which is the main cause for the
output voltage ripple. For simplification, the
output voltage ripple can be estimated by:
Where
GEA
is
the
error
amplifier
transconductance.
⎛
⎜
⎝
⎞
VOUT
VOUT
VIN
⎜
⎟
⎟
⎠
∆VOUT
=
× 1−
2
8 × fS × L × C2
MP2307 Rev. 1.7
3/14/2006
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